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Results 1 - 10
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111
Visualizing dynamic memory allocations
- In VISSOFT’07: Proceedings of 4th IEEE International Workshop on Visualizing Software for Understanding and Analysis (to appear) (2007), IEEE CS
"... We present a visualization tool for dynamic memory allocation information obtained from instrumenting the runtime allocator used by C programs. The goal of the presented visualization techniques is to convey insight in the dynamic behavior of the allocator. The purpose is to help the allocator desig ..."
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Cited by 5 (0 self)
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designers understand how the performance and working of the allocator depend on the actual allocation scenarios in order to optimize its functionality by decreasing fragmentation and improving response time. We use an orthogonal dense pixel layout of time versus memory space which can show tens of thousands
Memory and Fitness Optimization of Bacteria under Fluctuating Environments
, 2014
"... Bacteria prudently regulate their metabolic phenotypes by sensing the availability of specific nutrients, expressing the required genes for their metabolism, and repressing them after specific metabolites are depleted. It is unclear, however, how genetic networks maintain and transmit phenotypic sta ..."
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of stable intracellular lac proteins dramatically reduces lag phases under cyclical fluctuations with intermediate timescales (1–10 generations). Second, response memory, a hysteretic behavior in which gene expression persists after removal of its external inducer, enhances adaptation when environments
Understanding the Behavior of Shared Memory Applications Using the SMiLE Monitoring Framework
, 2000
"... Data locality is a key factor for the performance of parallel systems. In a Distributed Shared Memory (DSM) system, however, it is difficult for the users to maintain a high data locality as it is usually a priori unknown how the data is distributed among the nodes. In this article we introduce a mo ..."
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monitoring framework that allows users to understand the memory behavior of parallel applications. The information offered by the monitor system enables data to be allocated or redistributed more rationally among memories. This reduces remote memory accesses and further improves parallel performance
Using Simulation to Understand the Data Layout of Programs
- In Proceedings of the IASTED International Conference on Applied Simulation and Modelling (ASM 2001
, 2001
"... One of the most prominent performance issues on NUMA systems is the access latency to remote memories, which can be several orders of magnitude higher than the one of local memory accesses. Effective data allocation that limits the necessity to access remote memories therefore has the potential to s ..."
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Cited by 10 (10 self)
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One of the most prominent performance issues on NUMA systems is the access latency to remote memories, which can be several orders of magnitude higher than the one of local memory accesses. Effective data allocation that limits the necessity to access remote memories therefore has the potential
Integer Programming Based Register Allocation
"... this paper is based on that prior work. The primary objective of this project is to significantly speedup the integer programming based register allocator ORA (Optimal Register Allocator). Significant speedup is expected from the discovery of application-specific methods for solving register allocat ..."
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this paper is based on that prior work. The primary objective of this project is to significantly speedup the integer programming based register allocator ORA (Optimal Register Allocator). Significant speedup is expected from the discovery of application-specific methods for solving register
Cache-Conscious Allocation of Pointer-Based Data Structures Revisited with
, 2002
"... As memory access times continue to be a bottleneck, differential research is required for better understanding of memory access performance. Studies of cache-conscious allocation and software prefetch have recently sparked research in the area of software optimizations on memory, as pointer-based da ..."
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As memory access times continue to be a bottleneck, differential research is required for better understanding of memory access performance. Studies of cache-conscious allocation and software prefetch have recently sparked research in the area of software optimizations on memory, as pointer
Understanding TCP Vegas: . . .
, 2002
"... We view congestion control as a distributed primal–dual algorithm carried out by sources and links over a network to solve a global optimization problem. We describe a multilink multisource model of the TCP Vegas congestion control mechanism. The model provides a fundamental understanding of delay, ..."
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We view congestion control as a distributed primal–dual algorithm carried out by sources and links over a network to solve a global optimization problem. We describe a multilink multisource model of the TCP Vegas congestion control mechanism. The model provides a fundamental understanding of delay
Review article Memories that last forever: strategies for optimizing vaccine T-cell memory
"... For acute self-limiting infections a vac-cine is successful if it elicits memory at least as good as the natural experience; however, for persistent and chronic infec-tions such as HIV, hepatitis C virus (HCV), human papillomavirus (HPV), and human herpes viruses, this paradigm is not appli-cable. A ..."
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For acute self-limiting infections a vac-cine is successful if it elicits memory at least as good as the natural experience; however, for persistent and chronic infec-tions such as HIV, hepatitis C virus (HCV), human papillomavirus (HPV), and human herpes viruses, this paradigm is not appli
Cache-Conscious Allocation of Pointer-Based Data Structures Revisited with HW/SW Prefetching
- in ‘2 n d Annual Workshop on Duplicating, Deconstructing, and Debunking
, 2003
"... As memory access times continue to be a bottleneck, differential research is required for better understanding of memory access performance. Studies of cache-conscious allocation and software prefetch have recently sparked research in the area of software optimizations on memory, as pointer-based da ..."
Abstract
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Cited by 2 (0 self)
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As memory access times continue to be a bottleneck, differential research is required for better understanding of memory access performance. Studies of cache-conscious allocation and software prefetch have recently sparked research in the area of software optimizations on memory, as pointer
A Quantitative Performance Analysis Model for GPU Architectures
- In HPCA
, 2011
"... We develop a microbenchmark-based performance model for NVIDIA GeForce 200-series GPUs. Our model identifies GPU program bottlenecks and quantitatively analyzes performance, and thus allows programmers and architects to predict the benefits of potential program optimizations and architectural improv ..."
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Cited by 57 (2 self)
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on performance, allowing us to understand the configuration of the fastest dense matrix multiply implementation and to optimize the tridiagonal solver and sparse matrix vector multiply by 60 % and 18 % respectively. Furthermore, our model applied to analysis on these codes allows us to suggest architectural
Results 1 - 10
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111
