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Unbounded Transactional Memory

by C. Scott Ananian, Krste Asanović, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie , 2005
"... Background: Programming in a shared-memory environment often requires the use of atomic regions for program correctness. Traditionally, atomicity is achieved through critical sections protected by locks. Unfortunately, locks are very difficult to program with since they introduce problems such as de ..."
Abstract - Cited by 261 (8 self) - Add to MetaCart
Transactions: To overcome the problems with locks, Herlihy and Moss proposed a hardware transactional memory (HTM) [1] scheme that gives the programmer a more intuitive atomicity primitive, a transaction. A transaction is an atomic region that either completes atomically or fails and has no effect

Hybrid transactional memory

by Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum - IN PROC. 12TH INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOSXII , 2006
"... Transactional memory (TM) promises to substantially reduce the difficulty of writing correct, efficient, and scalable concurrent programs. But “bounded ” and “best-effort” hardware TM proposals impose unreasonable constraints on programmers, while more flexible software TM implementations are consid ..."
Abstract - Cited by 173 (11 self) - Add to MetaCart
are considered too slow. Proposals for supporting “unbounded” transactions in hardware entail significantly higher complexity and risk than best-effort designs. We introduce Hybrid Transactional Memory (HyTM), an approach to implementing TM in software so that it can use best-effort hardware TM (HTM) to boost

Virtualizing Transactional Memory

by Ravi Rajwar, et al. , 2005
"... Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based synchronization suffers from wellknown limitations, so researchers have considered nonblocking transactions as an alternative. Recent hardware proposals have demonstrated ho ..."
Abstract - Cited by 337 (3 self) - Add to MetaCart
Transactional Memory (VTM), a user-transparent system that shields the programmer from various platform-specific resource limitations. VTM maintains the performance advantage of hardware transactions, incurs low overhead in time, and has modest costs in hardware support. While many system-level challenges

Logtm: Log-based transactional memory

by Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill, David A. Wood - in HPCA , 2006
"... Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes providing data version management for the simultaneous storage of both new (visible if the transaction commits) and old (r ..."
Abstract - Cited by 282 (11 self) - Add to MetaCart
(retained if the transaction aborts) values. Most (hardware) TM systems leave old values “in place” (the target memory address) and buffer new values elsewhere until commit. This makes aborts fast, but penalizes (the much more frequent) commits. In this paper, we present a new implementation

Transactional Locking II

by Dave Dice, Ori Shalev, Nir Shavit - In Proc. of the 20th Intl. Symp. on Distributed Computing , 2006
"... Abstract. The transactional memory programming paradigm is gaining momentum as the approach of choice for replacing locks in concurrent programming. This paper introduces the transactional locking II (TL2) algorithm, a software transactional memory (STM) algorithm based on a combination of commit-ti ..."
Abstract - Cited by 359 (17 self) - Add to MetaCart
these characteristics make TL2 a viable candidate for deployment of transactional memory today, long before hardware transactional support is available. 1

Hybrid Transactional Memory

by Mark Moir - In ASPLOSXII: Proceedings of the 12th international conference on Architectural , 2005
"... Transactional memory (TM) promises to substantially reduce the difficulty of writing correct, efficient, and scalable concurrent programs. But previous “bounded ” and “best-effort” hardware TM implementations impose unreasonable constraints on programmers, while more flexible software TM implementat ..."
Abstract - Cited by 18 (4 self) - Add to MetaCart
in designers of mainstream commercial processors opting for “nothing ” for the forseeable future. We describe Hybrid Transactional Memory, an approach to implementing TM so that it uses best-effort hardware TM if it is available to boost performance, but does not expose programmers to any of its limitatons (or

Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory

by Lee Baugh, Naveen Neelakantam, Craig Zilles
"... We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be made strongly atomic by using memory protection on transactionally-held state, then showing how such a strongly-atomic STM c ..."
Abstract - Cited by 50 (1 self) - Add to MetaCart
can be used with a bounded hardware TM system to build a hybrid TM system in which zero-overhead hardware transactions may safely run concurrently with potentially-conflicting software transactions. We experimentally demonstrate how this hybrid TM organization avoids the common-case overheads

Logtm-se: Decoupling hardware transactional memory from caches

by Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, David A. Wood - In High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on , 2007
"... This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction’s read-and write-sets and detects conflicts on coherence requests (eager conflict detection). Transactions update memory “in place ” after s ..."
Abstract - Cited by 112 (15 self) - Add to MetaCart
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction’s read-and write-sets and detects conflicts on coherence requests (eager conflict detection). Transactions update memory “in place ” after

Unbounded Transactional Memory

by C. Scott, Ananian Krste, Asanović Bradley, C. Kuszmaul, Charles E. Leiserson, Sean Lie
"... Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional memory, called UTM, which exploits the common case for performance without sacrificing correctness on transactions whose ..."
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Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional memory, called UTM, which exploits the common case for performance without sacrificing correctness on transactions whose

Performance Pathologies in Hardware Transactional Memory.

by Jayaram Bobba , Kevin E Moore , Haris Volos , Luke Yen , Mark D Hill , Michael M Swift , David A Wood - In Proceedings of the 34th International Symposium on Computer Architecture, , 2007
"... pa•thol•o•gy any deviation from a healthy, normal, or efficient condition. ABSTRACT Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously proposed HTMs represent three points in this ..."
Abstract - Cited by 69 (5 self) - Add to MetaCart
pa•thol•o•gy any deviation from a healthy, normal, or efficient condition. ABSTRACT Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously proposed HTMs represent three points
Results 1 - 10 of 700