### Table 5 Resource Sharing Model

"... In PAGE 16: ...Table 5 Resource Sharing Model The results presented in Table5 illustrate the substantial gain in CPU time as the number of automata is reduced, and this with relatively little impact on memory re- quirements. Furthermore, this is seen to be true even when the state space within the grouped automata are not reduced.... ..."

### Table 5. Statistics from different stages of the translation to a propositional formula for the experiments on modeling the Data Memory with a regular memory and a translation box.

1999

Cited by 73

### Table 5: Resource Sharing Model

"... In PAGE 20: ... This reduction is not possible in models with N ? 1 resources. The results presented in Table5 illustrate the substantial gain in CPU time as the number of automata is reduced, and this with relatively little impact on memory requirements. Furthermore, this is seen to be true even when the state space within the grouped automata are not reduced.... ..."

Cited by 9

### Table 2 Storage, Memory Accesses and Computation Requirements of the Different Memory Model Translation Schemes

"... In PAGE 6: ...Table 2 Storage, Memory Accesses and Computation Requirements of the Different Memory Model Translation Schemes Table2 provides a comparison among these three choices along with the associated trade-offs, with respect to storage requirements as well as memory operations and computations. The number of memory operations is proportional to the number of computational steps needed for the address calculation measurement.... ..."

### Table 5. Statistics from different stages of the translation to a propositional formula for the experiments on modeling the Data Memory with a regular memory and a translation box.

### Table 2: Effect of Resource Sharing on Partitioning

1990

"... In PAGE 3: ... CPU run times are reported in seconds DecStation 3100 with 16 MBytes of memory. Table2 shows the effect of resource sharing using an example of fifth order digital wave filter[14 scription was translated into HardwareC from an ISP description consists of 26 add operations and 8 multiply In addition, the design also contains 15 I/O operations. description used in Table 2 the multiply by a constant filter description is replaced by combinational shift synthesis phase by Hercules.... In PAGE 3: ... Table 2 shows the effect of resource sharing using an example of fifth order digital wave filter[14 scription was translated into HardwareC from an ISP description consists of 26 add operations and 8 multiply In addition, the design also contains 15 I/O operations. description used in Table2 the multiply by a constant filter description is replaced by combinational shift synthesis phase by Hercules. As shown in the Table elliptic filter without any resource sharing is 6458.... In PAGE 3: ... On partitioning the overall size increases increases to 17 cycles. Table2 also compares running for four different heuristics: simulated annealing (SA), cost function consisting of only area and pin-out costs... In PAGE 4: ... Table 3 illustrates the effect of latency, area and pin-out constraints on partitioning results for the elliptic filter containing 26 add and 8 multiply resources. In contrast to the filter considered in Table2 , the multiply oper- ations are now not restricted to be by 2 only. The multiply operations are instead modeled by calls to hardware blocks requiring two cycles per oper- ation.... In PAGE 4: ... The multiply operations are instead modeled by calls to hardware blocks requiring two cycles per oper- ation. Therefore, total size of the unpartitioned filter is 12542 considerably bigger than the filter description used in Table2 . The latency of the unpar- titioned filter in this case is 20 cycles.... ..."

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