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Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems

by Padmanabhan Pillai, Kang G. Shin , 2001
"... In recent years, there has been a rapid and wide spread of nontraditional computing platforms, especially mobile and portable computing devices. As applications become increasingly sophisticated and processing power increases, the most serious limitation on these devices is the available battery lif ..."
Abstract - Cited by 501 (4 self) - Add to MetaCart
the necessary peak computation power in general-purpose systems. However, for a large class of applications in embedded real-time systems like cellular phones and camcorders, the variable operating frequency interferes with their deadline guarantee mechanisms, and DVS in this context, despite its growing

System architecture directions for networked sensors

by Jason Hill, Robert Szewczyk, Alec Woo, Seth Hollar, David Culler, Kristofer Pister - IN ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS , 2000
"... Technological progress in integrated, low-power, CMOS communication devices and sensors makes a rich design space of networked sensors viable. They can be deeply embedded in the physical world or spread throughout our environment. The missing elements are an overall system architecture and a methodo ..."
Abstract - Cited by 1789 (58 self) - Add to MetaCart
Technological progress in integrated, low-power, CMOS communication devices and sensors makes a rich design space of networked sensors viable. They can be deeply embedded in the physical world or spread throughout our environment. The missing elements are an overall system architecture and a

The Cougar Approach to In-Network Query Processing in Sensor Networks

by Yong Yao, Johannes Gehrke - SIGMOD Record , 2002
"... The widespread distribution and availability of smallscale sensors, actuators, and embedded processors is transforming the physical world into a computing platform. One such example is a sensor network consisting of a large number of sensor nodes that combine physical sensing capabilities such as te ..."
Abstract - Cited by 498 (1 self) - Add to MetaCart
the data is aggregated and stored for offline querying and analysis. This approach has two major drawbacks. First, the user cannot change the behavior of the system on the fly. Second, conservation of battery power is a major design factor, but a central system cannot make use of in-network programming

Pin: building customized program analysis tools with dynamic instrumentation

by Chi-keung Luk, Robert Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janapa Reddi, Kim Hazelwood - IN PLDI ’05: PROCEEDINGS OF THE 2005 ACM SIGPLAN CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION , 2005
"... Robust and powerful software instrumentation tools are essential for program analysis tasks such as profiling, performance evaluation, and bug detection. To meet this need, we have developed a new instrumentation system called Pin. Our goals are to provide easy-to-use, portable, transparent, and eff ..."
Abstract - Cited by 991 (35 self) - Add to MetaCart
Robust and powerful software instrumentation tools are essential for program analysis tasks such as profiling, performance evaluation, and bug detection. To meet this need, we have developed a new instrumentation system called Pin. Our goals are to provide easy-to-use, portable, transparent

A wireless sensor network for structural monitoring

by Ning Xu, Sumit Rangwala, Krishna Kant Chintalapudi, Deepak Ganesan, Alan Broad, Ramesh Govindan, Deborah Estrin - SENSYS ’04: PROCEEDINGS OF THE 2ND INTERNATIONAL , 2004
"... Structural monitoring—the collection and analysis of structural response to ambient or forced excitation–is an important application of networked embedded sensing with significant commercial potential. The first generation of sensor networks for structural monitoring are likely to be data acquisitio ..."
Abstract - Cited by 336 (12 self) - Add to MetaCart
acquisition systems that collect data at a single node for centralized processing. In this paper, we discuss the design and evaluation of a wireless sensor network system (called Wisden) for structural data acquisition. Wisden incorporates two novel mechanisms, reliable data transport using a hybrid of end

Razor: A low-power pipeline based on circuit-level timing speculation

by Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev Rao, Toan Pham, Conrad Ziesler, David Blaauw, Todd Austin, Krisztian Flautner, Trevor Mudge - in Proc. IEEE/ACM Int. Symp. Microarchitect , 2003
"... With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the more effective and widely used methods for poweraware computing is dynamic voltage scaling (DVS). In order to obtain the ..."
Abstract - Cited by 288 (8 self) - Add to MetaCart
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the more effective and widely used methods for poweraware computing is dynamic voltage scaling (DVS). In order to obtain

Scratchpad Memory: A Design Alternative for Cache On-chip memory in Embedded Systems

by Rajeshwari Banakar, Stefan Steinke, Bo-sik Lee, M. Balakrishnan, Peter Marwedel - In Tenth International Symposium on Hardware/Software Codesign (CODES), Estes Park , 2002
"... In this paper we address the problem of on-chip memory selection for computationally intensive applications, by proposing scratch pad memory as an alternative to cache. Area and energy for different scratch pad and cache sizes are computed using the CACTI tool while performance was evaluated using t ..."
Abstract - Cited by 200 (16 self) - Add to MetaCart
the trace results of the simulator. The target processor chosen for evaluation was AT91M40400. The results clearly establish scratchpad memory as a low power alternative in most situations with an average energy reduction of 40%. Further the average area-time reduction for the scratchpad memory was 46

Design of a Wireless Sensor Network Platform for Detecting Rare, Random, and Ephemeral Events

by Prabal Dutta, Mike Grimmer, Anish Arora, Steven Bibyk, David Culler , 2005
"... We present the design of the eXtreme Scale Mote, a new sensor network platform for reliably detecting and classifying, and quickly reporting, rare, random, and ephemeral events in a largescale, long-lived, and retaskable manner. This new mote was designed for the ExScal project which seeks to demons ..."
Abstract - Cited by 172 (18 self) - Add to MetaCart
requirements which could not be met with existing hardware, and therefore motivated the design of a new platform. The detection and classification requirements are met using infrared, magnetic, and acoustic sensors. The infrared and acoustic sensors are designed for low-power continuous operation and include

Platform-based design and software design methodology for embedded systems

by Alberto Sangiovanni-vincentelli, Grant Martin - IEEE Design & Test of Computers , 2001
"... Embedded products have become so complex and must be developed so quickly that current design methodologies are no longer adequate. The authors ’ vision for the future of embedded-system design involves two essential components: a rigorous methodology for embedded software development and platform-b ..."
Abstract - Cited by 101 (4 self) - Add to MetaCart
Embedded products have become so complex and must be developed so quickly that current design methodologies are no longer adequate. The authors ’ vision for the future of embedded-system design involves two essential components: a rigorous methodology for embedded software development and platform

Memory Exploration for Low Power, Embedded Systems

by Wen-Tsong Shiue, Chaitali Chakrabarti , 1999
"... In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory exploration strategy based on three performance metrics, namely, cache size, the number of processor cycles and the ener ..."
Abstract - Cited by 90 (2 self) - Add to MetaCart
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory exploration strategy based on three performance metrics, namely, cache size, the number of processor cycles
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