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181
Flat Parametric Counter Automata
- In Automata, Languages and Programming, 33 rd International Colloquium, ICALP 2006
, 2006
"... Abstract. In this paper we study the reachability problem for parametric flatcounter automata, in relation with the satisfiability problem of three fragments of integer arithmetic. The equivalence between non-parametric flat counter au-tomata and Presburger arithmetic has been established previously ..."
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Cited by 25 (8 self)
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Introduction Flat counter automata [5, 6, 3, 4] have been extensively studied, as an important classof infinite-state systems, for which the reachability problem is decidable. The results obtained so far have been used in a number of successful verification tools, like FAST[2], LASH [18] or TREX [1]. Comon
Verification of String Manipulating Programs Using Multi-Track Automata
"... Verification of string manipulation operations is a crucial problem in computer security. We present a new symbolic string verification technique that can be used to prove that vulnerabilities that result from improper string manipulation do not exist in a given program. We formally characterize the ..."
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computation using an automata based widening operation. In order to handle branch conditions in string systems, we describe the precise construction of multi-track DFAs for linear word equations, such as c1X1c2 = c ′ 1X2c ′ 2, as well as Boolean combinations of these equations. We show that non-linear word
Temporal logics for specification and verification
, 2009
"... The course will comprise ten 40-min lectures, delivered 2 per day, with a 5-10 min break in between. Prerequisites This is an introductory course and the participants are only expected to have some background in classical and modal logic. In addition, some knowledge of computability and complexity, ..."
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Cited by 1 (0 self)
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, finite automata, and a general idea of formal specification and verification would be an advantage. Course notes content These course notes contain parts of draft chapters from a book in preparation on “Temporal logics in Computer Science ” by Stéphane Demri and myself. Not all material included
Verification of Description Logic Knowledge and Action Bases
, 2012
"... doi:10.3233/978-1-61499-098-7-103 ..."
Temporal Verification of Real-Time Multitasking Application Properties Based on Communicating Timed Automata
- Proc. in 8-th IEEE International Symposium on Distributed Simulation and Real Time Applications
, 2004
"... This paper proposes a method for temporal verification of real-time multitasking application properties based on a communicating timed automata IF language. The properties are divided into two kinds: local properties of application elements like object creation/destruction, object length, task deadl ..."
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Cited by 1 (0 self)
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deadlocks and secondly global properties such as data age, deadline, and time interval verification. These properties are represented by observer automata and verified by the IF2C tool exhaustive simulation. The notion of phase is used to reduce the IF representation graph by partitioning the application
Basic semantic model Method Application Implementation and Experimentation Conclusions Compositional Verification for Component-based Systems and Application
, 2008
"... Verification for concurrent systems Hard problem due to state explosion Compositional verification techniques limit state explosion. One example of compositional rules is B1 < Φ1>, B2 < Φ2>, C (Φ1,Φ2,Φ) B1‖B2 < Φ> One approach is assume-garantie but many issues make it difficult su ..."
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Verification for concurrent systems Hard problem due to state explosion Compositional verification techniques limit state explosion. One example of compositional rules is B1 < Φ1>, B2 < Φ2>, C (Φ1,Φ2,Φ) B1‖B2 < Φ> One approach is assume-garantie but many issues make it difficult
Status Report on Software Verification
- COMPETITION SUMMARY SV-COMP 2014
, 2014
"... This report describes the 3rd International Competition on Software Verification (SV-COMP 2014), which is the third edition of a thorough comparative evaluation of fully automatic software verifiers. The reported results represent the state of the art in automatic soft-ware verification, in terms ..."
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Cited by 3 (3 self)
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of effectiveness and efficiency. The verification tasks of the competition consist of nine categories containing a total of 2 868 C programs, covering bit-vector operations, concurrent execution, control-flow and integer data-flow, device-drivers, heap data structures, memory manipulation via pointers, recursive
Timed SystemC Waiting-State Automata
"... System-Level Modeling using system-level languages like SystemC or SystemVerilog is gaining more and more popularity. They are supposed to provide the garantee of critical functional properties about the interaction between concurrent processes like determinism or liveness up to a basic unit, the de ..."
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of multiprocessing real-time embedded systems [1], we propose a formal model based on SystemC waiting-state automata [2] that conforms to the SystemC scheduler up to delta-cycles (1) and that also conforms to the provided time constraints (2). 1.
Some Properties of Reactive Fiffo Automata
"... Abstract. We are interested in the verification of real-time systems modelled with Reactive Fiffo 1 Automata. This model provides with the ability of memorizing events when they must not be taken into account at their occurrence date. We aim at deciding the boundedness of the queue. 1 Research Area ..."
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Abstract. We are interested in the verification of real-time systems modelled with Reactive Fiffo 1 Automata. This model provides with the ability of memorizing events when they must not be taken into account at their occurrence date. We aim at deciding the boundedness of the queue. 1 Research Area
Verification in Networked Embedded Systems ∗ 1 Abstract
, 2006
"... In this summer, we propose to automatically translate nesC to hybrid/timed automata, which could be served as the first step to achieve Networked Embedded System verifica-tion. Based on that, we may verify some ongoing projects such as classification. Some verification issues, e.g., scalability, are ..."
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In this summer, we propose to automatically translate nesC to hybrid/timed automata, which could be served as the first step to achieve Networked Embedded System verifica-tion. Based on that, we may verify some ongoing projects such as classification. Some verification issues, e.g., scalability
Results 1 - 10
of
181