Results 1 - 10
of
529
TABLE 2a) Business Instruments Compared and Contrasted PROCESS F.A.R.
"... In PAGE 33: ... TABLE2 b) Business Instruments Compared and Contrasted PROCESS F.... In PAGE 34: ... TABLE2 c) Business Instruments Compared and Contrasted PROCESS F.... ..."
TABLE 2a) Business Instruments Compared and Contrasted PROCESS F.A.R.
"... In PAGE 33: ... TABLE2 b) Business Instruments Compared and Contrasted PROCESS F.... In PAGE 34: ... TABLE2 c) Business Instruments Compared and Contrasted PROCESS F.... ..."
Table 5: Data for Dies in Multichip Modules Die Power Die Size Die Centroid (x; y)
in Thermal Characterization Of Electronic Packages Using A Three-Dimensional Fourier Series Solution
"... In PAGE 10: ... value of R ja = 2.5 C=W has been selected. A ther- mal grease was used between the heat sink and the seal lid to minimize the contact resistance and to promote heat transfer to the heat sink. The MCM had 5 dies of various sizes and power levels as shown in Table5 . All exposed surfaces of the MCM are assumed to have a uniformly speci ed convective boundary condition.... ..."
Table 4.4 Dimensions for Staggered Die configuration Parameter (mm) 3-Die 5-Die 7-Die
Table 1: Experimental die dimensions.
"... In PAGE 3: ....033 and 0.066 (0.084cm and 0.167cm). The three dies have dimensions given in Table1 . These dies are appreciably larger than those in the experiments of Tas (4cm die diameter) and Liu et al.... ..."
Table 1: SNAP Die Fab Status
1995
"... In PAGE 2: ....p. = wave pipelined, F.P. = oating-point In most of our work wevalidated our techniques by realizing implementations. Table1 is a summary of our chip fabrication activities. 2 Algorithms and Systems In the remainder of this paper we summarize some of the techniques and algorithms whichhavebeende- veloped.... In PAGE 5: ... Ea lt; Eb - same as case (a) with Ea and Eb swapped. Table1 : SNAP Addition Rounding Operations. tive, the result itself is bit-inverted to obtain a possible mantissa.... ..."
Cited by 1
Table 1: SNAP Die Fab Status
1995
"... In PAGE 2: ....p. = wave pipelined, F.P. = oating-point In most of our work we validated our techniques by realizing implementations. Table1 is a summary of our chip fabrication activities. 2 Algorithms and Systems In the remainder of this paper we summarize some of the techniques and algorithms which have been de- veloped.... In PAGE 5: ... Ea lt; Eb - same as case (a) with Ea and Eb swapped. Table1 : SNAP Addition Rounding Operations. tive, the result itself is bit-inverted to obtain a possible mantissa.... ..."
Cited by 1
Results 1 - 10
of
529