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� Intel Xeon Phi (MIC)
, 2013
"... an evaluation and explanation of the performance differences of executing LULESH (starting with ..."
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an evaluation and explanation of the performance differences of executing LULESH (starting with
Coprocessor
"... Abstract—Construction of whole-genome networks from large-scale gene expression data is an important problem in systems biology. While several techniques have been developed, most cannot handle network reconstruction at the whole-genome scale, and the few that can, require large clusters. In this pa ..."
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from 3,137 microarray experiments in only 22 minutes. In addition, our optimization for parallelizing mutual information computation on the Intel Xeon Phi coprocessor holds out lessons that are applicable to other domains. Index Terms—gene networks, mutual information, systems biology, Xeon Phi F
Optimizing the MapReduce Framework on Intel Xeon Phi Coprocessor
"... Abstract—With the ease-of-programming, flexibility and yet effi-ciency, MapReduce has become one of the most popular frameworks for building big-data applications. MapReduce was originally de-signed for distributed-computing, and has been extended to various architectures, e,g, multi-core CPUs, GPUs ..."
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, GPUs and FPGAs. In this work, we focus on optimizing the MapReduce framework on Xeon Phi, which is the latest product released by Intel based on the Many Integrated Core Architecture. To the best of our knowledge, this is the first work to optimize the MapReduce framework on the Xeon Phi. In our work
Characterization of Intel Xeon Phi for Linear Algebra
, 2014
"... This study focuses on applicability of Intel Xeon Phi coprocessor for some of the Basic Linear Algebra Subprograms (BLAS) subroutines. Based on Many Integrated Core (MIC) architecture, the vector processing unit (VPU) in Xeon Phi coprocessor provides data parallelism at a very fine grain, working on ..."
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This study focuses on applicability of Intel Xeon Phi coprocessor for some of the Basic Linear Algebra Subprograms (BLAS) subroutines. Based on Many Integrated Core (MIC) architecture, the vector processing unit (VPU) in Xeon Phi coprocessor provides data parallelism at a very fine grain, working
Improving Communication Performance and Scalability of Native Applications on Intel R © Xeon Phi TM Coprocessor Clusters
"... coprocessor-based clusters of-fer high compute and memory performance for parallel work-loads and also support direct network access. Many real world applications are significantly impacted by network character-istics and to maximize the performance of such applications on these clusters, it is part ..."
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coprocessor-based clusters of-fer high compute and memory performance for parallel work-loads and also support direct network access. Many real world applications are significantly impacted by network character-istics and to maximize the performance of such applications on these clusters
Parallel Mutual Information Based Construction of Whole-Genome Networks on the Intel R © Xeon PhiTM Coprocessor
"... Abstract—Construction of whole-genome networks from large-scale gene expression data is an important problem in systems biology. While several techniques have been developed, most cannot handle network reconstruction at the whole-genome scale, and the few that can, require large clusters. In this pa ..."
A survey of general-purpose computation on graphics hardware
, 2007
"... The rapid increase in the performance of graphics hardware, coupled with recent improvements in its programmability, have made graphics hardware acompelling platform for computationally demanding tasks in awide variety of application domains. In this report, we describe, summarize, and analyze the l ..."
Abstract
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Cited by 545 (18 self)
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The rapid increase in the performance of graphics hardware, coupled with recent improvements in its programmability, have made graphics hardware acompelling platform for computationally demanding tasks in awide variety of application domains. In this report, we describe, summarize, and analyze
Managing Energy and Server Resources in Hosting Centers
- In Proceedings of the 18th ACM Symposium on Operating System Principles (SOSP
, 2001
"... Interact hosting centers serve multiple service sites from a common hardware base. This paper presents the design and implementation of an architecture for resource management in a hosting center op-erating system, with an emphasis on energy as a driving resource management issue for large server cl ..."
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Cited by 558 (37 self)
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in accordance with negotiated Service Level Agreements (SLAs). Our system is based on an economic approach to managing shared server resources, in which services "bid " for resources as a func-tion of delivered performance. The system continuously moni-tors load and plans resource allotments
Wireless Communications
, 2005
"... Copyright c ○ 2005 by Cambridge University Press. This material is in copyright. Subject to statutory exception and to the provisions of relevant collective licensing agreements, no reproduction of any part may take place without the written permission of Cambridge University ..."
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Cited by 1129 (32 self)
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Copyright c ○ 2005 by Cambridge University Press. This material is in copyright. Subject to statutory exception and to the provisions of relevant collective licensing agreements, no reproduction of any part may take place without the written permission of Cambridge University
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