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129
OpenMDSP: Extending OpenMP to Program Multi-Core DSP
"... Abstract—Multi-core Digital Signal Processors (DSP) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing etc. Comparing with general purpose multi-processors, the multicore DSPs normally have more complex memory hierarchy, such as on ..."
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Cited by 2 (0 self)
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, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, it is very challenging to write efficient multi-core DSP applications. The current approach to program multi-core DSPs is based on proprietary vendor SDKs, which only provides low-level, non-portable primitives. While
Multi-core Implementations of the Concurrent Collections Programming Model
"... Abstract. In this paper we introduce the Concurrent Collections pro-gramming model, which builds on past work on TStreams [8]. In this model, programs are written in terms of high-level application-specific operations. These operations are partially ordered according to only their semantic constrain ..."
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Abstract. In this paper we introduce the Concurrent Collections pro-gramming model, which builds on past work on TStreams [8]. In this model, programs are written in terms of high-level application-specific operations. These operations are partially ordered according to only their semantic
Exploiting coarse-grained task, data, and pipeline parallelism in stream programs,
- Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS-XII,
, 2006
"... Abstract As multicore architectures enter the mainstream, there is a pressing demand for high-level programming models that can effectively map to them. Stream programming offers an attractive way to expose coarse-grained parallelism, as streaming applications (image, video, DSP, etc.) are naturall ..."
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Cited by 133 (6 self)
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Abstract As multicore architectures enter the mainstream, there is a pressing demand for high-level programming models that can effectively map to them. Stream programming offers an attractive way to expose coarse-grained parallelism, as streaming applications (image, video, DSP, etc
Research Article A Parallelized Implementation of Turbo Decoding Based on Network on Chip Multi-core Processor
, 2014
"... With the evolution of wireless communication systems, it is increasingly difficult for Application Specific Integrated Circuit (ASIC) solutions to meet the daily changing requirements. A network on chip (NOC) multi-core processor based on message-passing programming model is designed to implement th ..."
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With the evolution of wireless communication systems, it is increasingly difficult for Application Specific Integrated Circuit (ASIC) solutions to meet the daily changing requirements. A network on chip (NOC) multi-core processor based on message-passing programming model is designed to implement
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-core Co-design
- In Proc. of International Symposium on Computer Architecture and High Performance Computing
, 2008
"... Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to characterize the interaction between hardware transactional memory (HTM) design dimensions and multi-core microarchitecture c ..."
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Cited by 4 (3 self)
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configuration. In this paper, we investigate the use of analytical modeling techniques to build application-specific performance models for understanding the interaction between HTM and multi-core configurations across large design points and for efficiently exploring the co-design space between the two. A key
The design and implementation Ocelot’s dynamic binary translator from PTX to multi-core x86
, 2009
"... Abstract—Ocelot is a dynamic compilation framework designed to map the explicitly parallel PTX execution model used by NVIDIA CUDA applications onto diverse many-core architectures. Ocelot includes a dynamic binary translator from PTX to many-core processors that leverages the LLVM code generator to ..."
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Cited by 8 (1 self)
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Abstract—Ocelot is a dynamic compilation framework designed to map the explicitly parallel PTX execution model used by NVIDIA CUDA applications onto diverse many-core architectures. Ocelot includes a dynamic binary translator from PTX to many-core processors that leverages the LLVM code generator
Author manuscript, published in "Pespma 2010- Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture (2010)" Energy Efficiency via the N-way Model
, 2010
"... With core counts as well as heterogeneity on the rise, the sequential components of applications are becoming the major bottleneck in performance scaling as predicted by Amdahl’s law. We are therefore faced with the simultaneous problems of occupying an increasing number of cores and improving seque ..."
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sequential performance. In this work, we specifically focus on improving the energy efficiency of sequential algorithms through the n-way programming model. In previous work, we introduced the n-way programming model which seeks to exploit the algorithmic diversity present in certain computations in order
A Performance Study of General-Purpose Applications on Graphics Processors Using CUDA
"... Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly programmable, offering the potential for dramatic speedups for a variety of generalpurpose applications compared to contempora ..."
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Cited by 86 (7 self)
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on the GPU. GPU performance is compared to both single-core and multicore CPU performance, with multicore CPU implementations written using OpenMP. The paper also discusses advantages and inefficiencies of the CUDA programming model and some desirable features that might allow for greater ease of use
Natively supporting true one-sided communication in MPI on multi-core systems with InfiniBand
- in Proceedings of the 9th International Symposium of Cluster Computing and the Grid (CCGrid), 2009
"... As high-end computing systems continue to grow in scale, the per-formance that applications can achieve on such large scale systems depends heavily on their ability to avoid explicitly synchronized communication with other processes in the system. Accordingly, several modern and legacy parallel prog ..."
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Cited by 3 (1 self)
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-speed networks such as InfiniBand (IB) to allow for true one-sided communication in MPI. In this paper, we extend this work to natively take advantage of one-sided atomic operations on cache-coherent multi-core/multi-processor architec-tures while still utilizing the benefits of networks such as IB. Specif
Parallel Consistency in Constraint Programming
"... Program parallelization becomes increasingly important when new multi-core architectures provide ways to improve performance. One of the greatest challenges of this development lies in programming parallel applications. Using declarative languages, such as constraint programming, can make the tran ..."
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Cited by 3 (3 self)
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Program parallelization becomes increasingly important when new multi-core architectures provide ways to improve performance. One of the greatest challenges of this development lies in programming parallel applications. Using declarative languages, such as constraint programming, can make
Results 1 - 10
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