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Results 11 - 20
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200
1 A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching
"... Abstract—In Network Intrusion Detection Systems (NIDSs), string pattern matching demands exceptionally high performance to match the content of network traffic against a predefined database (or dictionary) of malicious patterns. Much work has been done in this field; however, most of the prior work ..."
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Cited by 3 (0 self)
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results in low memory efficiency (defined as the ratio of the amount of the required storage in bytes and the size of the dictionary in number of characters). Due to such inefficiency, state-of-the-art designs cannot support large dictionaries without using high-latency external DRAM. We propose
Design and Realization of a Modular 200 MSample/s 12-bit Pipelined A/D Converter Block Using Deep-Submicron Digital CMOS Technology
"... In this paper, we present the design, verification, system integration and the physical realization of a fully integrated high-speed analog-digital converter (ADC) macro block with 12-bit accuracy. The entire circuit architecture is built with a modular approach, consisting of identical units organi ..."
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In this paper, we present the design, verification, system integration and the physical realization of a fully integrated high-speed analog-digital converter (ADC) macro block with 12-bit accuracy. The entire circuit architecture is built with a modular approach, consisting of identical units
Using Differential Adhesion to Control Self-Assembly and Self-Repair of Collections of Modular Mobile Robots
, 2005
"... This thesis presents a novel distributed control method which allows a collection of independently mobile robotic units, with two or three dimensional movement, to self-assemble into self-repairing hierarchical structures. The proposed method utilises a simple model of the cellular adhesion mechanis ..."
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Cited by 1 (1 self)
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mechanisms observed in biological cells, al-lowing the robotic units to form virtually bonded aggregates which behave as predicted by Steinberg’s differential adhesion hypothesis. Simulated robotic units based on the design of the subaquatic HYDRON module are introduced as a possible platform on which
Prototype Development of 3-Phase 3.3kV/220V 6kVA Modular Semiconductor Transformer
"... Jun-Young Lee․Nam-Sup Choi) Abstract- This paper describes a prototype of 3-phase 3.3kV/220V 6kVA modular semiconductor transformer developed in the lab for feasibility study. The developed prototype is composed of three single-phase units coupled in Y-connection. Each single-phase unit with a ratin ..."
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rating of 1.9kV/127V 2kVA consists of a high-voltage high-frequency resonant AC-DC converter, a low-voltage hybrid-switching DC-DC converter, and a low-voltage hybrid-switching DC-AC converter. Also each single-phase unit has two DSP controllers to control converter operation and to acquire monitoring
Design of 3-D optical network on chip
- in Proc. Symp. Photonics Optoelectron
, 2009
"... Abstract — Optical network on chip is an emerging research topic, which can provide low latency and high bandwidth with significantly lower power dissipation. A 3D mesh based optical network on chip is developed together with a new optical router architecture as the basic units. The new router fully ..."
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Cited by 1 (0 self)
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Abstract — Optical network on chip is an emerging research topic, which can provide low latency and high bandwidth with significantly lower power dissipation. A 3D mesh based optical network on chip is developed together with a new optical router architecture as the basic units. The new router
HDL Library of Processing Units for Generic and DVB-S2 LDPC Decoding
- In. Proc. International Conference on Signal Processing and Multimédia Applications (SIGMAP2006
, 2006
"... Abstract: This paper proposes an efficient HDL library of processing units for generic and DVB-S2 LDPC decoders following a modular and automatic design approach. General purpose, low complexity and high throughput bit node and check node functional models are developed. Both full serial and paralle ..."
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Abstract: This paper proposes an efficient HDL library of processing units for generic and DVB-S2 LDPC decoders following a modular and automatic design approach. General purpose, low complexity and high throughput bit node and check node functional models are developed. Both full serial
Packet-Switched vs. Time-Multiplexed FPGA Overlay Networks
- in Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines. IEEE
, 2006
"... Abstract — Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited degree of PE interconnectivity (e.g. wiring up gates and datapaths). Applications which virtualize PEs may require ..."
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Cited by 29 (10 self)
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a large number of distinct PE-to-PE connections (e.g. using one PE to simulate 100s of operators, each requiring input data from thousands of other operators), but with each connection having low throughput compared with the PE’s operating cycle time. In these highly interconnected conditions
Results 11 - 20
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200
