### Table 1: Garbled OR Gate

2004

"... In PAGE 2: ... In contrast, the key k0 3 is encrypted under the pair of keys associated with (0; 0). See Table1 below.... In PAGE 3: ...1 and k 2 corresponding to and , and the four table values (found in the fourth column of Table1 ), it is possible to decrypt and obtain the output wire key kg( ; ) 3 . Furthermore, as required above, this is the only value that can be obtained (the other keys on the input wires are not known and so only a single table value can be decrypted).... In PAGE 6: ...) The reason that we require these additional properties is to enable the receiver to correctly compute the garbled circuit. Recall that in every gate, the receiver is given two random keys that enable it to decrypt and obtain the random key for the gate-output wire; see Table1 . A problem that immediately arises here is how can the receiver know which value is the intended decryption.... ..."

Cited by 17

### Table 1: Garbled OR Gate

2004

"... In PAGE 2: ... In contrast, the key k0 3 is encrypted under the pair of keys associated with (0; 0). See Table1 below.... In PAGE 3: ...1 and kfl 2 corresponding to fi and fl, and the four table values (found in the fourth column of Table1 ), it is possible to decrypt and obtain the output wire key kg(fi;fl) 3 . Furthermore, as required above, this is the only value that can be obtained (the other keys on the input wires are not known and so only a single table value can be decrypted).... In PAGE 6: ...) The reason that we require these additional properties is to enable the receiver to correctly compute the garbled circuit. Recall that in every gate, the receiver is given two random keys that enable it to decrypt and obtain the random key for the gate-output wire; see Table1 . A problem that immediately arises here is how can the receiver know which value is the intended decryption.... ..."

Cited by 17

### Table 1: Arithmetical circuits

1998

"... In PAGE 5: ...e. adders and multipliers #28see Table1 #29. In the #0Crst column the name of the function is given.... ..."

Cited by 28

### Table 1: Arithmetical circuits

1998

"... In PAGE 5: ...e. adders and multipliers #28see Table1 #29. In the #0Crst column the name of the function is given.... ..."

Cited by 28

### Table 3: Determination of power component in arithmetic circuits

### Table II: Power component measurement in arithmetic circuits [4].

### Table 1: Lower bounds for depth 3 arithmetic circuits

"... In PAGE 3: ... In particular, this result strengthens our previous bound in the functional framework (the reason for including the latter in the paper lies in its simplicity and applicability to symmetric functions). Table1 summarizes our current knowledge about the best known lower... ..."

### Table 5: Number of possible shorts of 2 nodes for a typical symp- tom for the worst-case where all 2 shorts are equally likely. The percentages characterize how many of all possible 2 or smaller can- didates are node shorts. All circuits come from the ISCAS-85 test suite. c432 is a 27-channel interrupt controller, c499 is a 32-bit single-error-correcting-circuit, and c880 is an 8-bit arithmetic logic

in Modeling

### Table 1. Size of the arithmetic unit

"... In PAGE 8: ... Other cells are used just for data movement. For an NA2N image having CW different intensity levels, the width of the arithmetic unit is given in Table1 . All other data path units in the circuit need very small chip area, and therefore, the... ..."