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54
Toward a Methodology for Unified Verification of Hardware/Software Co-designs
"... Abstract. Critical and private applications of smart and connected ob-jects such as health-related objects are now common, thus raising the need to design these objects with strong security guarantees. Many re-cent works offer practical hardware-assisted security solutions that take advantage of a t ..."
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Abstract. Critical and private applications of smart and connected ob-jects such as health-related objects are now common, thus raising the need to design these objects with strong security guarantees. Many re-cent works offer practical hardware-assisted security solutions that take advantage of a
Formal co-validation of low-level hardware/software interfaces
- In 13th Int’l Conf. Formal Methods in Computer-Aided Design
, 2013
"... Abstract-Today's microelectronics industry is increasingly confronted with the challenge of developing and validating software that closely interacts with hardware. These interactions make it difficult to design and validate the hardware and software separately; instead, a verifiable co-design ..."
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Cited by 1 (0 self)
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Abstract-Today's microelectronics industry is increasingly confronted with the challenge of developing and validating software that closely interacts with hardware. These interactions make it difficult to design and validate the hardware and software separately; instead, a verifiable co-design
IOS Press Formal Analysis of SystemC Designs in Process Algebra
"... Abstract. SystemC is an IEEE standard system-level language used in hardware/software co-design and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC designs by providing a mapping to the process algebra mCRL2. Our mapping formalizes both the simula ..."
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Abstract. SystemC is an IEEE standard system-level language used in hardware/software co-design and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC designs by providing a mapping to the process algebra mCRL2. Our mapping formalizes both
Practical and Verifiable C++ Dynamic Cast for Hard Real-Time Systems
"... The dynamic cast operation allows flexibility in the design and use of data management facilities in object-oriented programs. Dynamic cast has an important role in the implementation of the Data Management Services (DMS) of the Mission Data System Project (MDS), the Jet Propulsion Laboratory’s expe ..."
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-simulation framework to formally verify and evaluate the G&S fast dynamic casting scheme and its applicability in the Mission Data System DMS application. We describe the systematic process of model-based simulation and analysis that has led to performance improvement of the G&S algorithm’s heuristics by about
Process Algebraic Verification of SystemC Codes
"... SystemC is an IEEE standard system-level language used in hardware/software co-design and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC codes by providing a mapping to the process algebra mCRL2. The outstanding advantages of mCRL2 are the suppor ..."
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Cited by 6 (5 self)
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SystemC is an IEEE standard system-level language used in hardware/software co-design and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC codes by providing a mapping to the process algebra mCRL2. The outstanding advantages of mCRL2
SMART: Secure and Minimal Architecture for (Establishing a Dynamic) Root of Trust
- IN: PROCEEDINGS OF THE 19TH ANNUAL NETWORK AND DISTRIBUTED SYSTEM SECURITY SYMPOSIUM
"... Remote attestation is the process of securely verifying internal state of a remote hardware platform. It can be achieved either statically (at boot time) or dynamically, at run-time in order to establish a dynamic root of trust. The latter allows full isolation of a code region from preexisting soft ..."
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Cited by 14 (6 self)
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involve security co-processors that are too costly for low-end embedded devices. In this paper, we develop a new primitive (called SMART) based on hardware-software co-design. SMART is a simple, efficient and secure approach for establishing a dynamic root of trust in a re-mote embedded device. We focus
Application of Process Algebraic Verification and Reduction Techniques to SystemC Designs
"... SystemC is an IEEE standard system-level language used in hardware/software codesign and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC designs by providing a mapping to the process algebra mCRL2. Our mapping formalizes both the simulation semant ..."
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SystemC is an IEEE standard system-level language used in hardware/software codesign and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC designs by providing a mapping to the process algebra mCRL2. Our mapping formalizes both the simulation
ii List of Publications
, 2014
"... pages 156–175, 2013. [2] Johannes Buchmann, Denise Demirel, and Jeroen van de Graaf. Towards a publicly-verifiable mix-net providing everlasting privacy. In Financial Cryptog-raphy, pages 197–204, 2013. [3] Denise Demirel, Jeroen van de Graaf, and Roberto Araùjo. Improving helios ..."
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pages 156–175, 2013. [2] Johannes Buchmann, Denise Demirel, and Jeroen van de Graaf. Towards a publicly-verifiable mix-net providing everlasting privacy. In Financial Cryptog-raphy, pages 197–204, 2013. [3] Denise Demirel, Jeroen van de Graaf, and Roberto Araùjo. Improving helios
Human Trust Establishment
, 2011
"... Users regularly experience a crisis of confidence on the Internet. Is that email truly originating from the claimed individual? Is that Facebook invitation indeed from that person or is it a fake page set up by an impersonator? These doubts are usually resolved through a leap of faith, expressing th ..."
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Users regularly experience a crisis of confidence on the Internet. Is that email truly originating from the claimed individual? Is that Facebook invitation indeed from that person or is it a fake page set up by an impersonator? These doubts are usually resolved through a leap of faith, expressing the desperation of users. To establish a secure basis for Internet communication, we propose SafeSlinger, a system leveraging the proliferation of smartphones to enable people to securely and privately exchange their public keys. Through the exchanged authentic public key, SafeSlinger establishes a secure channel offering secrecy and authenticity, which we use to support secure messaging and file exchange. Essentially, we support an abstraction to safely “sling ” information from one device to another. 1 SafeSlinger also provides an API for importing applications’ public keys into a user’s contact information. By slinging entire contact entries to others, we support secure introductions, as the contact entry includes the SafeSlinger public keys as well as other public keys that were important. As a result, SafeSlinger provides an easy-to-use and understand approach for trust establishment among people. 1.
unknown title
"... This document serves to define and extend BLIF-MV, adding some new constructs and making some syntacticalchanges. BLIF-MV is an intermediate format used as input to synthesis and verification systems. Synthesis subsets of high-level languages, such as Verilog, VHDL, and Esterel, can be mapped to BLI ..."
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and expressive intermediate format for formal verification, logic synthesis, and possibly hardware/ Formal verification is the process of verifying designs by proving properties about them. To make formal verifi-cation possible in real designs, several problems must be solved. We consider several integration
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