Results 1  10
of
340,252
Crosslevel Validation of Topological Quantum Circuits
"... Abstract. Quantum computing promises a new approach to solving difficult computational problems, and the quest of building a quantum computer has started. While the first attempts on construction were succesful, scalability has never been achieved, due to the inherent fragile nature of the quantum ..."
Abstract
 Add to MetaCart
. In this paper we introduce the first method for crosslevel validation of TQC circuits. The specification of the circuit is expressed based on the stabilizer formalism, and the stabilizer table is checked by mapping the topology on the physical qubit level, followed by quantum circuit simulation. Sim
Measuring ISP Topologies with Rocketfuel
 In Proc. ACM SIGCOMM
, 2002
"... To date, realistic ISP topologies have not been accessible to the research community, leaving work that depends on topology on an uncertain footing. In this paper, we present new Internet mapping techniques that have enabled us to directly measure routerlevel ISP topologies. Our techniques reduce t ..."
Abstract

Cited by 838 (30 self)
 Add to MetaCart
To date, realistic ISP topologies have not been accessible to the research community, leaving work that depends on topology on an uncertain footing. In this paper, we present new Internet mapping techniques that have enabled us to directly measure routerlevel ISP topologies. Our techniques reduce
Quantum Gravity
, 2004
"... We describe the basic assumptions and key results of loop quantum gravity, which is a background independent approach to quantum gravity. The emphasis is on the basic physical principles and how one deduces predictions from them, at a level suitable for physicists in other areas such as string theor ..."
Abstract

Cited by 566 (11 self)
 Add to MetaCart
We describe the basic assumptions and key results of loop quantum gravity, which is a background independent approach to quantum gravity. The emphasis is on the basic physical principles and how one deduces predictions from them, at a level suitable for physicists in other areas such as string
Evolving Neural Networks through Augmenting Topologies
 Evolutionary Computation
"... An important question in neuroevolution is how to gain an advantage from evolving neural network topologies along with weights. We present a method, NeuroEvolution of Augmenting Topologies (NEAT), which outperforms the best fixedtopology method on a challenging benchmark reinforcement learning task ..."
Abstract

Cited by 524 (113 self)
 Add to MetaCart
An important question in neuroevolution is how to gain an advantage from evolving neural network topologies along with weights. We present a method, NeuroEvolution of Augmenting Topologies (NEAT), which outperforms the best fixedtopology method on a challenging benchmark reinforcement learning
Predicting Transmembrane Protein Topology with a Hidden Markov Model: Application to Complete Genomes
 J. MOL. BIOL
, 2001
"... ..."
KodairaSpencer theory of gravity and exact results for quantum string amplitudes
 Commun. Math. Phys
, 1994
"... We develop techniques to compute higher loop string amplitudes for twisted N = 2 theories with ĉ = 3 (i.e. the critical case). An important ingredient is the discovery of an anomaly at every genus in decoupling of BRST trivial states, captured to all orders by a master anomaly equation. In a particu ..."
Abstract

Cited by 545 (60 self)
 Add to MetaCart
particular realization of the N = 2 theories, the resulting string field theory is equivalent to a topological theory in six dimensions, the Kodaira– Spencer theory, which may be viewed as the closed string analog of the Chern–Simon theory. Using the mirror map this leads to computation of the ‘number
LowPower CMOS Digital Design
 JOURNAL OF SOLIDSTATE CIRCUITS. VOL 27, NO 4. APRIL 1992 413
, 1992
"... Motivated by emerging batteryoperated applications that demand intensive computation in portable environments, techniques are investigated which reduce power consumption in CMOS digital circuits while maintaining computational throughput. Techniques for lowpower operation are shown which use the ..."
Abstract

Cited by 570 (20 self)
 Add to MetaCart
Motivated by emerging batteryoperated applications that demand intensive computation in portable environments, techniques are investigated which reduce power consumption in CMOS digital circuits while maintaining computational throughput. Techniques for lowpower operation are shown which use
Statistical mechanics of complex networks
 Rev. Mod. Phys
"... Complex networks describe a wide range of systems in nature and society, much quoted examples including the cell, a network of chemicals linked by chemical reactions, or the Internet, a network of routers and computers connected by physical links. While traditionally these systems were modeled as ra ..."
Abstract

Cited by 2083 (10 self)
 Add to MetaCart
as random graphs, it is increasingly recognized that the topology and evolution of real
Primitives for the manipulation of general subdivisions and the computations of Voronoi diagrams
 ACM Tmns. Graph
, 1985
"... The following problem is discussed: Given n points in the plane (the sites) and an arbitrary query point 4, find the site that is closest to q. This problem can be solved by constructing the Voronoi diagram of the given sites and then locating the query point in one of its regions. Two algorithms ar ..."
Abstract

Cited by 543 (11 self)
 Add to MetaCart
to the separation of the geometrical and topological aspects of the problem and to the use of two simple but powerful primitives, a geometric predicate and an operator for manipulating the topology of the diagram. The topology is represented by a new data structure for generalized diagrams, that is, embeddings
Route Packets, Not Wires: OnChip Interconnection Networks
, 2001
"... Using onchip interconnection networks in place of adhoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules (processors, memories, peripherals, etc...) communicate by sending packets to one another over the network. The structur ..."
Abstract

Cited by 864 (10 self)
 Add to MetaCart
Using onchip interconnection networks in place of adhoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules (processors, memories, peripherals, etc...) communicate by sending packets to one another over the network
Results 1  10
of
340,252