Results 1 - 10 of 482,113

Interprocedural Compilation of Fortran D for MIMD Distributed-Memory Machines

by Mary W. Hall, Seema Hiranandani, Ken Kennedy, Chau-Wen Tseng - COMMUNICATIONS OF THE ACM , 1992
"... Algorithms exist for compiling Fortran D for MIMD distributed-memory machines, but are significantly restricted in the presence of procedure calls. This paper presents interprocedural analysis, optimization, and code generation algorithms for Fortran D that limit compilation to only one pass over ea ..."
Abstract - Cited by 333 (48 self) - Add to MetaCart
Algorithms exist for compiling Fortran D for MIMD distributed-memory machines, but are significantly restricted in the presence of procedure calls. This paper presents interprocedural analysis, optimization, and code generation algorithms for Fortran D that limit compilation to only one pass over

Compiling High Performance Fortran for distributed-memory systems

by Jonathan Harris, John A. Bircsak, M. Regina Bolduc, Jill Ann Diewald, Israel Gale, Neil W. Johnson, C. Alexander Nelson, Carl D. Offner - Digital Technical Journal of Digital Equipment Corp , 1995
"... a language for writing parallel programs. The compiler generates code for distributed-memory machines consisting of interconnected workstations or servers powered by Digital’s Alpha microprocessors. The DEC Fortran 90 compiler efficiently implements the features of Fortran 90 and HPF that support pa ..."
Abstract - Cited by 11 (1 self) - Add to MetaCart
a language for writing parallel programs. The compiler generates code for distributed-memory machines consisting of interconnected workstations or servers powered by Digital’s Alpha microprocessors. The DEC Fortran 90 compiler efficiently implements the features of Fortran 90 and HPF that support

An Extended Set of Fortran Basic Linear Algebra Subprograms

by Jack J. Dongarra, Jeremy Du Croz, Sven Hammarling, Richard J. Hanson - ACM TRANSACTIONS ON MATHEMATICAL SOFTWARE , 1986
"... This paper describes an extension to the set of Basic Linear Algebra Subprograms. The extensions are targeted at matrix-vector operations which should provide for efficient and portable implementations of algorithms for high performance computers. ..."
Abstract - Cited by 526 (72 self) - Add to MetaCart
This paper describes an extension to the set of Basic Linear Algebra Subprograms. The extensions are targeted at matrix-vector operations which should provide for efficient and portable implementations of algorithms for high performance computers.

An introduction to software architecture

by David Garlan, Mary Shaw - Advances in Software Engineering and Knowledge Engineering , 1993
"... ..."
Abstract - Cited by 697 (35 self) - Add to MetaCart
Abstract not found

The PARADIGM Compiler for Distributed-Memory Message Passing Multicomputers

by Prithviraj Banerjee, John A. Chandy, Manish Gupta, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su - IEEE Computer , 1994
"... The PARADIGM compiler project provides an automated means to parallelize programs, written in a serial programming model, for efficient execution on distributed-memory multicomputers. In addition to performing traditional compiler optimizations, PARADIGM is unique in that it addresses many other is ..."
Abstract - Cited by 112 (9 self) - Add to MetaCart
The PARADIGM compiler project provides an automated means to parallelize programs, written in a serial programming model, for efficient execution on distributed-memory multicomputers. In addition to performing traditional compiler optimizations, PARADIGM is unique in that it addresses many other

A high-performance, portable implementation of the MPI message passing interface standard

by Ewing Lusk, Nathan Doss, Anthony Skjellum - Parallel Computing , 1996
"... MPI (Message Passing Interface) is a specification for a standard library for message passing that was defined by the MPI Forum, a broadly based group of parallel computer vendors, library writers, and applications specialists. Multiple implementations of MPI have been developed. In this paper, we d ..."
Abstract - Cited by 888 (67 self) - Add to MetaCart
describe MPICH, unique among existing implementations in its design goal of combining portability with high performance. We document its portability and performance and describe the architecture by which these features are simultaneously achieved. We also discuss the set of tools that accompany the free

FFTW: An Adaptive Software Architecture For The FFT

by Matteo Frigo, Steven G. Johnson , 1998
"... FFT literature has been mostly concerned with minimizing the number of floating-point operations performed by an algorithm. Unfortunately, on present-day microprocessors this measure is far less important than it used to be, and interactions with the processor pipeline and the memory hierarchy have ..."
Abstract - Cited by 605 (4 self) - Add to MetaCart
FFT literature has been mostly concerned with minimizing the number of floating-point operations performed by an algorithm. Unfortunately, on present-day microprocessors this measure is far less important than it used to be, and interactions with the processor pipeline and the memory hierarchy have

The Architecture of Cognition

by John R. Anderson , 1983
"... Spanning seven orders of magnitude: a challenge for ..."
Abstract - Cited by 1580 (40 self) - Add to MetaCart
Spanning seven orders of magnitude: a challenge for

Parallel database systems: the future of high performance database systems

by David J. Dewitt, Jim Gray - Communications of the ACM , 1992
"... Abstract: Parallel database machine architectures have evolved from the use of exotic hardware to a software parallel dataflow architecture based on conventional shared-nothing hardware. These new designs provide impressive speedup and scaleup when processing relational database queries. This paper ..."
Abstract - Cited by 638 (13 self) - Add to MetaCart
Abstract: Parallel database machine architectures have evolved from the use of exotic hardware to a software parallel dataflow architecture based on conventional shared-nothing hardware. These new designs provide impressive speedup and scaleup when processing relational database queries. This paper

Wattch: A Framework for Architectural-Level Power Analysis and Optimizations

by David Brooks, Vivek Tiwari, Margaret Martonosi - In Proceedings of the 27th Annual International Symposium on Computer Architecture , 2000
"... Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve high ..."
Abstract - Cited by 1295 (43 self) - Add to MetaCart
Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve
Results 1 - 10 of 482,113