core, some Flash and some SRAM. In particular, we show how we can configure the FPGA board wirelessly. ii Acknowledgements First and foremost, I am deeply indebted to my supervisor, Andres Upegui. His encouragement, support, and advice have been immensely valuable. Moreover, he was always available

Edited by Scott Hauck and Andre ́ DeHon AMSTERDAM • BOSTON • HEIDELBERG • LONDON

This paper introduces Perplexus, a European project that aims to develop a scalable hardware platform made of custom reconfigurable devices endowed with bio-inspired capabilities. This platform will enable the simulation of large-scale complex systems and the study of emergent com-plex behaviors in a virtually unbounded wireless network of computing modules. The final infrastructure will be used as a simulation tool for three applications: neurobiological modeling, culture dissemination modeling, and cooperative collective robotics. The Perplexus platform will provide a novel modeling framework thanks to the pervasive nature of the hardware platform, its bio-inspired capabilities, its strong interaction with the environment, and its dynamic topology. 1.

In spite of the high parallelism exhibited by cellular automata architectures, most implementations are usually run in software. For increasing execution parallelism, hardware implementations on FPGAs have been proposed, under the cost of being un-flexible, and inefficient in terms of resource utilization. In this paper we present a platform for evolving CA by exploiting the partial re-configurability of current commercial FPGAs. Our implementation includes an on-chip soft-processor that generates a partial bitstream, reconfigures the FPGA, and computes the fitness. After finding a good individual, the evolved CA can be used as a peripheral for performing useful computation. As case study we present CA co-evolution for a random number generator and for the firefly synchronization problem. 1

Abstract. In this contribution, we describe a hardware platform for evolving a fuzzy system by using Fuzzy CoCo — a cooperative coevolutionary methodology for fuzzy system design — in order to speed up both evolution and execution. Reconfigurable hardware arises between hardware and software solutions providing a trade-off between flexibility and performance. We present an architecture that exploits the dynamic partial reconfiguration capabilities of recent FPGAs so as to provide adaptation at two different levels: major structural changes and fuzzy parameter tuning. 1

interface for

Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting up a dynamically reconfigurable system remains a painful and complicated task. In this paper we propose a framework for performing it in an easy way, for a specific application: Modular Robotics. We propose an architecture containing a Microblaze processor and a reconfigurable module. The module is defined in VHDL and synthesized by the user; then we provide the scripts for easily generating the corresponding configuration bitstreams for a dynamic partial reconfigurable controller for our Modular Robot. The proposed framework is easily extendable to other applications.

and online optimization

Randomly connecting networks have proven to be universal computing machines. By interconnecting a set of nodes in a random way one can model very complicated non-linear dynamic systems. Although random Boolean networks (RBN) use Boolean functions as their basic component, there are not hardware implementations of such systems. The absence of implementations is mainly due to the arbitrary connectionism exhibited by the network, and connection flexibility use to be very expensive in terms of hardware resources. In this paper we present an onchip self-reconfigurable approach for providing a flexible connectionism at very low resource cost by partially reconfiguring Virtex II FPGAs. 1.

The complexity exhibited by pervasive systems is constantly increasing. Customer electronics devices provide day to day a larger amount of functionalities. A common approach for guaranteeing high performance is to include specialized coprocessor units. However, these systems lack flexibility, since one must define, in advance, the coprocessor functionality. A solution to this problem is to use run-time reconfigurable coprocessors, exploiting the advantages of hardware while keeping a flexible platform. In this paper, we describe a self-reconfigurable pervasive platform containing a dynamically reconfigurable cryptographic coprocessor. We consider three ciphering algorithms and we compare the performance of the coprocessor against a full-software implementation. 1.