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Low-Power CMOS Digital Design
- JOURNAL OF SOLID-STATE CIRCUITS. VOL 27, NO 4. APRIL 1992 413
, 1992
"... Motivated by emerging battery-operated applications that demand intensive computation in portable environments, techniques are investigated which reduce power consumption in CMOS digital circuits while maintaining computational throughput. Techniques for low-power operation are shown which use the ..."
Abstract
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Cited by 570 (20 self)
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the lowest possible supply voltage coupled with architectural, logic style, circuit, and technology optimizations. An architectural-based scaling strategy is presented which indicates that the optimum voltage is much lower than that determined by other scaling considerations. This optimum is achieved
Wattch: A Framework for Architectural-Level Power Analysis and Optimizations
- In Proceedings of the 27th Annual International Symposium on Computer Architecture
, 2000
"... Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve high ..."
Abstract
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Cited by 1295 (43 self)
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Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve
Wireless sensor networks: a survey
, 2002
"... This paper describes the concept of sensor networks which has been made viable by the convergence of microelectro-mechanical systems technology, wireless communications and digital electronics. First, the sensing tasks and the potential sensor networks applications are explored, and a review of fact ..."
Abstract
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Cited by 1936 (23 self)
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This paper describes the concept of sensor networks which has been made viable by the convergence of microelectro-mechanical systems technology, wireless communications and digital electronics. First, the sensing tasks and the potential sensor networks applications are explored, and a review
Wrapper Induction for Information Extraction
, 1997
"... The Internet presents numerous sources of useful information---telephone directories, product catalogs, stock quotes, weather forecasts, etc. Recently, many systems have been built that automatically gather and manipulate such information on a user's behalf. However, these resources are usually ..."
Abstract
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Cited by 612 (30 self)
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are usually formatted for use by people (e.g., the relevant content is embedded in HTML pages), so extracting their content is difficult. Wrappers are often used for this purpose. A wrapper is a procedure for extracting a particular resource's content. Unfortunately, hand-coding wrappers is tedious. We
The Future of Wires
, 1999
"... this paper we first discuss the wire metrics of interest and examine them in a contemporary 0.25m process. We then discuss technology scaling over the next several generations, from SIA and other predictions, and how our wire metrics trend over that time. We will examine the delay and bandwidth lim ..."
Abstract
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Cited by 508 (7 self)
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this paper we first discuss the wire metrics of interest and examine them in a contemporary 0.25m process. We then discuss technology scaling over the next several generations, from SIA and other predictions, and how our wire metrics trend over that time. We will examine the delay and bandwidth
Wireless Communications
, 2005
"... Copyright c ○ 2005 by Cambridge University Press. This material is in copyright. Subject to statutory exception and to the provisions of relevant collective licensing agreements, no reproduction of any part may take place without the written permission of Cambridge University ..."
Abstract
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Cited by 1129 (32 self)
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Copyright c ○ 2005 by Cambridge University Press. This material is in copyright. Subject to statutory exception and to the provisions of relevant collective licensing agreements, no reproduction of any part may take place without the written permission of Cambridge University
The Landscape of Parallel Computing Research: A View from Berkeley
- TECHNICAL REPORT, UC BERKELEY
, 2006
"... ..."
CMOS Voltage Reference
"... Abstract—An ultra low-power, precise voltage reference using a switched-capacitor technique in 0.35- m CMOS is presented in this paper. The temperature dependence of the carrier mobility and channel length modulation effect can be effectively minimized by using 3.3 and 5 V-type transistors to operat ..."
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Abstract—An ultra low-power, precise voltage reference using a switched-capacitor technique in 0.35- m CMOS is presented in this paper. The temperature dependence of the carrier mobility and channel length modulation effect can be effectively minimized by using 3.3 and 5 V-type transistors
CMOS
, 2008
"... A 32kb 10T subthreshold SRAM array with bit-interleaving and differential read scheme in 90nm CMOS ..."
Abstract
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A 32kb 10T subthreshold SRAM array with bit-interleaving and differential read scheme in 90nm CMOS
High-performance poly-Si nanowire NMOS transistors
- IEEE Trans. Nanotechnol
, 2007
"... Abstract—A novel field-effect transistor with Si nanowire (NW) channels is developed and characterized. To enhance the film crystallinity, metal-induced lateral crystallization (MILC) and/or rapid thermal annealing (RTA) techniques are adopted in the fabrication. In the implementation of MILC proces ..."
Abstract
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Cited by 5 (2 self)
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Abstract—A novel field-effect transistor with Si nanowire (NW) channels is developed and characterized. To enhance the film crystallinity, metal-induced lateral crystallization (MILC) and/or rapid thermal annealing (RTA) techniques are adopted in the fabrication. In the implementation of MILC
Results 1 - 10
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37,068