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A Ka band, static, MCML frequency divider, in standard 90nm-CMOS LP for 60 GHz applications Citation for published version (APA): A Ka Band, Static, MCML Frequency Divider, in Standard 90nm- CMOS LP for 60 GHz Applications
"... . (2007). A Ka band, static, MCML frequency divider, in standard 90nm-CMOS LP for 60 GHz applications. In IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 : 3 -5 June 2007 Please check the document version of this publication: • A submitted manuscript is the version of the article up ..."
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. (2007). A Ka band, static, MCML frequency divider, in standard 90nm-CMOS LP for 60 GHz applications. In IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 : 3 -5 June 2007 Please check the document version of this publication: • A submitted manuscript is the version of the article
CMOS phased array transceiver technology for 60 GHz wireless applications
- IEEE Trans. Antennas Propagat
, 2010
"... Abstract—Based on the indoor radio-wave propagation analysis, and the fundamental limits of CMOS technology it is shown that phased array technology is the ultimate solution for the radio and physical layer of the millimeter wave multi-Gb/s wireless networks. A low-cost, single-receiver array archit ..."
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architecture with RF phase-shifting is proposed and design, analysis and measurements of its key components are presented. A high-gain, two-stage, low noise amplifier in 90 nm-CMOS technology with more than 20 dB gain over the 60 GHz spectrum is designed. Furthermore, a broadband analog phase shifter with a
18.5 A 90nm CMOS Low-Power 60GHz Transceiver with Integrated Baseband Circuitry
"... This paper presents key design techniques and challenges in implementing one of the first integrated, energy-efficient 60GHz transceivers including baseband circuitry. The 90nm CMOS direct-conversion design (Fig. 18.5.1) operates from a 1.2V supply and has been optimized for 5-to-10Gb/s QPSK modulat ..."
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This paper presents key design techniques and challenges in implementing one of the first integrated, energy-efficient 60GHz transceivers including baseband circuitry. The 90nm CMOS direct-conversion design (Fig. 18.5.1) operates from a 1.2V supply and has been optimized for 5-to-10Gb/s QPSK
9.2 A Robust 24mW 60GHz Receiver in 90nm Standard CMOS
"... Emerging applications for the 60GHz spectrum include extremely high-data-rate short-range communication systems. Many of these applications are expected to enter the realm of consumer electronics where low cost and mass production are prerequisites, favoring the application of digital CMOS technolog ..."
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Emerging applications for the 60GHz spectrum include extremely high-data-rate short-range communication systems. Many of these applications are expected to enter the realm of consumer electronics where low cost and mass production are prerequisites, favoring the application of digital CMOS
An Ultra-Low-Power Transformer-Feedback 60 GHz Low-Noise Amplifier in 90 nm CMOS
"... (LNA) with a 12.5 dB peak gain and a 5.4 dB minimum NF is demonstrated in a 90 nm CMOS technology. The LNA is com-posed of four cascaded common-source stages with the gate-source transformer feedback applied to the input stage for simultaneous noise and input matching. Also, the drain-source transfo ..."
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(LNA) with a 12.5 dB peak gain and a 5.4 dB minimum NF is demonstrated in a 90 nm CMOS technology. The LNA is com-posed of four cascaded common-source stages with the gate-source transformer feedback applied to the input stage for simultaneous noise and input matching. Also, the drain
IEEE 2007 Custom Intergrated Circuits Conference (CICC) A 60 GHz Power Amplifier in 90nm CMOS
"... designed and fabricated. The amplifier has a measured power gain of 9.8 dB. The input is gain matched while the output is matched to maximize the output power. The measured P−1dB = 6.7 dBm with a corresponding power added efficiency of 20%. This amplifier can be used as a pre-driver or as the main P ..."
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designed and fabricated. The amplifier has a measured power gain of 9.8 dB. The input is gain matched while the output is matched to maximize the output power. The measured P−1dB = 6.7 dBm with a corresponding power added efficiency of 20%. This amplifier can be used as a pre-driver or as the main
24.4 Design of CMOS for 60GHz Applications
"... Recently, 7GHz of unlicensed bandwidth around 60GHz was opened allowing for a variety of applications including Gb/s point-to-point links, wireless local area networks with extraordinary capacity, and vehicular radar at nearby frequencies. Presently, the exploitation of this band is minimal because ..."
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Recently, 7GHz of unlicensed bandwidth around 60GHz was opened allowing for a variety of applications including Gb/s point-to-point links, wireless local area networks with extraordinary capacity, and vehicular radar at nearby frequencies. Presently, the exploitation of this band is minimal because
31.2 A 60GHz 1V +12.3dBm Transformer-Coupled Wideband PA in 90nm CMOS
"... The opening up of the mm-wave band has created opportunities for high-data-rate communication, radar and medical imaging. The cost and size advantages of CMOS have motivated research on 60GHz CMOS front-end design [1]. However, very few CMOS mmwave power amplifiers (PAs) have been reported so far. F ..."
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. Furthermore, most of the mm-wave PAs reported use bulky transmission lines [2, 3], increasing silicon area and incurring higher substrate losses. We demonstrate a fully integrated 60GHz transformer-coupled two-stage differential power amplifier with single-ended input and output in 90nm digital CMOS
Measuring the gap between fpgas and asics
- in ACM International Symposium on Field Programmable Gate Arrays
, 2006
"... This paper presents experimental measurements of the dif-ferences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power consumption. We are motivated to make these measurements to enable system designers to make better in-formed choices between ..."
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Cited by 221 (6 self)
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This paper presents experimental measurements of the dif-ferences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power consumption. We are motivated to make these measurements to enable system designers to make better in-formed choices
A 60-GHz Down-Converting CMOS Single-Gate Mixer
"... Abstract — A quadrature balanced single-gate CMOS mixer, designed to exploit the unlicensed band around 60-GHz, is presented. Also a millimeter-wave (mm-wave) modeling methodology is discussed which is suitable for the design of CMOS mm-wave active mixers. The performance of a fullyintegrated mixer ..."
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Cited by 8 (1 self)
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fabricated on a standard digital 130-nm CMOS process is given and compared to the simulations. At a radio frequency (RF) of 60 GHz, intermediate frequency (IF) of 2 GHz, and low LO power of 0 dBm, conversion loss is better than 2 dB, and an input-referred 1-dB compression point of – 3.5 dBm was measured
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