Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double-precision processing Clock

Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double precision processing Clock

players. The hardware architecture of CoolFlux DSP comprises a dual Harvard memory architecture; full 24/56 bits data paths, two 24x24 bit multipliers and 56 bit accumulators. Extensive addressing modes ensure efficient memory access without cycle penalties. This includes modulo protection and bitreversed

proposed for digit-serial/parallel multiplication for trinomials is found to involve nearly 56 % less area-time complexity compared with the best of the corresponding existing multipliers; and the existing design of bit-serial basis conversion is found to involve nearly twice area-time complexity compared

Abstract not found

some paths cannot be set up fully transparently because the transmission quality requirements (i.e. pre-FEC Bit Error Rate (BER) = 10-9 or Q-factor = 15.56 dB) cannot be fulfilled. This result might have a severe consequence on the performance of all-optical networks especially in terms of rejection

-performance pipelines. This thesis proposes and evaluates architectural and microarchitectural fingerprints. A finger-print is a compact (e.g., 16-bit) signature of recent architectural or microarchitectural state updates. By periodically comparing a fingerprint and a reference over an interval of execution, the system

den angegebenen Quellen und Hilfsmitteln angefertigt zu haben. Alle Stellen, die aus Quellen entnommen wurden, sind als solche kenntlich gemacht. Diese Arbeit hat in gleicher oder ähnlicher Form noch keiner Prüfungsbehörde vorgelegen. Darmstadt, den 26.06.2012 (T. Kilian) Contents

Digital signatures are an important primitive for building secure systems and are used in most real world security protocols. However, almost all popular signature schemes are either based on the factoring as-sumption (RSA) or the hardness of the discrete logarithm problem (DSA/ECDSA). In the case of classical cryptanalytic advances or progress on the development of quantum computers the hardness of these closely related problems might be seriously weakened. A potential alternative approach is the construction of sig-nature schemes based on the hardness of certain lattices problems which are assumed to be intractable by quantum computers. Due to significant research advancements in recent years, lattice-based schemes have now become practical and appear to be a very viable alternative to number-theoretic cryptography. In this paper we focus on recent developments and the current state-of-the-art in lattice-based digital signatures and provide a comprehensive survey discussing signature schemes with respect to practicality. Additionally, we discuss future research areas that are essential for the continued development of lattice-based cryptography.

ACKNOWLEDGMENTS I would like to give many thanks to Dr. Shengli Fu and Dr. Yan Huang as my advi-