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TABLE II. Formation energies Eform (eV) [29,31] of Ti1?xAlxHy systems. Ti3Al AlH TiH
Table 6. Carrier operating and capital costs for Los Angeles-San Francisco network
"... In PAGE 14: ... Energy consumption per passenger varies with the speed and increases rapidly when the speed is over 300 kph (Pavaux 1991). Table6 presents the average costs used in this study. These were adopted from estimates for high-speed rail in Europe developed by IN- RETS/INTRAPLAN (1994), which have been used by the French Railroad to estimate operating costs for future planned TGV lines.... In PAGE 16: ...7 billion seat-kilometers. Table6 shows the different components of the operating cost as well as the rolling stock and infrastruc- ture capital cost. Dividing the operating cost of $ 280 million by 5.... In PAGE 23: ... Given all of the uncertainty inherent in the data, our analysis provides a first order estimate of the full cost of the trip on the California corridor from Los Angeles to San Francisco (677 km) of $ 163 per trip. Our esti- mates, shown in Table6 , suggest that the proposed high-speed rail system would require a public subsidy of $ 590,100,000 per year to be competitive with air transportation. It is important to understand the linkages between demand, supply, and cost.... ..."
Table 1: Load Balancing Statistics [18] Shasha D. and Goodman N. Concurrent Search Tree Algorithms, ACM Transactions on Database Systems, 13(1), 1988, pp. 53-90. [19] Weihl E. W. and Wang P. Multi-version Memory: Software cache Management for Concurrent B- Trees, Proceedings of the 2nd IEEE Symposium on Parallel and Distributed Processing, 1990, pp. 650-655. [20] Yen I. and Bastani F. Hash Table in Massively Parallel Systems, Proceedings of the 1992 Interna- tional Conferences on Computer Languages, April 20-23, 1992, pp. 660-664.
1992
"... In PAGE 16: ... With hot spots the variation is much greater, indicating the nice e ect load balancing has for smoothing the variation and reducing the gradient. Finally Table1 shows the calculated average number of moves made by a node in the entire system, with and without hot spots and with and without load balancing, and the normalized variation of the capacity at each processor from the mean. The table shows that the load balancing reduces the coe cient of variation at the cost of a very small increase in the average moves in the system, indicating that load balancing is e ective with low overhead.... ..."
Cited by 4
Table 11: Data for ATUM Traces on 8K Caches References [1] Anant Agarwal, John Hennessy, and Mark Horowitz, \Cache Performance of Operating Systems and Multiprogramming, quot; ACM Transactions on Computer Systems, 6(4):393{431, November 1988. [2] Anant Agarwal and Steven D. Pudar, \Column-Associative Caches: A Technique for Re- ducing the Miss Rate of Direct-Mapped Caches, quot; in Proceedings of the 20th Annual Inter- national Symposium on Computer Architecture, San Diego, California, pp. 179{190, ACM SIGARCH and IEEE Computer Society, May 17{19, 1993. Computer Architecture News, 21(2), May 1993.
1993
Cited by 1
Table 3: Global Phoneme Set [Worldbet notation] sounds [n], [d], [m], and [b], whereas others are not,as for example the phoneme [g], which is frequent in Ko- rean but extremely rare in Spanish. In the rst case sharing the data results in language independent ro- bust models of [n], [d], [m], and [b] and reduces the number of parameter of the nal system. In the latter case the less frequent phonemes like the Spanish [g] would bene t from sharing the training data across the languages, since more reliable estimation for this model can be achieved. Sounds belonging to only one language like [Nq] for Japanese or the apped [r(] for Spanish help solving the language identi cation prob- lem because these sounds are reliable predictors for one language.
2000
"... In PAGE 3: ... For eight languages this global set consists of 145 phoneme categories. Table3 shows the global phoneme set for ve languages in World- bet notation. About half of the set consists of mono- phonemes belonging to only one language, the other half is shared across at least two languages.... ..."
Cited by 1
Table 14: Data for Multitasking Traces on 8K Caches [8] Andr e Seznec, \A case for two-way skewed-associative caches, quot; in Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, California, pp. 169{178, ACM SIGARCH and IEEE Computer Society, May 17{19, 1993. Computer Architecture News, 21(2), May 1993. [9] Alan Jay Smith, \Cache Memories, quot; ACM Computing Surveys, 14(3):473{530, September 37
1993
Cited by 1
Table 2. The State-by-State Impacts of Port of Los Angeles/Long Beach One- month Closures
"... In PAGE 12: ... (2007) not to consider the indirect losses by imports might distort the economic roles of LA/LB ports. Table2 summarizes the state-by-state indirect impacts and the total impacts per person living in each state from two dirty bomb attacks on the LA/LB ports, using demand- and supply-driven NIEMO for the direct losses of exports ... In PAGE 16: ...revention costs should be distributed among U.S. residents. The last two columns in Table2 address how much residents in each state would be burdened as a result of terrorist attacks on the LA/LB twin-ports. As expected, each resident in California has the biggest burden, showing $200 for the case of total export losses and $670 for the total import losses.... ..."
Table 3: Generation of Byte Write Enables for SRAM Control Transfer size (bytes) N_TBST TSIZ[0:2] A[29:31] BWE[0:7]
2000
"... In PAGE 8: ..., and 3. The second data transfer writes one byte to byte lane 4. The address decoder handles misaligned data transfers by using three least significant address bits, A[29:31], along with the transfer size attributes, TSIZ[0:2], to generate byte write enables to the SRAMCTL module. Table3 shows the logic used to create the byte write enable signals passed to the SRAMCTL module. Figure 5: Address Pipeline Logic Block Diagram X246_05_121400 TT[0:4] TSIZ[2:0] N_TBST A[0:31] INPUT STAGE ADDRESS MUX BWE[0:7] BUSREQ BUSREQ_FLASH BURST R_nW MEMA[0:17] MUX OUTPUT STAGE ADDRESS Transfer Qualifier Decoder TS DATAXFR ENABLE_XFR CLK 8 www.... ..."
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