### Table 1. Execution of the non-deterministic automaton in Figure 7

2006

"... In PAGE 19: ...ig. 8. Execution of a non-deterministic automaton. Table1 shows the execution of the automaton shown in Figure 7 (b). At the beginning, the set of possible states contains all initial states, which is in this case fp1g.... ..."

Cited by 16

### Table 1.1: Nondeterministic to deterministic automaton conversion by the tabular method.

1995

Cited by 12

### Table 8.10: Transition table of the nondeterministic suffix automaton from Example 8.10

2006

### Table 8.12: Transition table of the nondeterministic factor automaton M1 for set SR = {abba, cbac} from Example 8.13

2006

### Table 4.1: Transition table of nondeterministic factor automaton MN(ababa) from Example 4.2

### Table 12.1: Transition table of nondeterministic factor automaton DCN(a aab) from Example 12.1

### Table 8.1: Transition table of the nondeterministic quot;Levenshtein quot; factor automaton from Example 8.1

### Table 1: Basic notations for labeled transition systems Note that S0 = s0-after- quot; is in S and is called the initial multi-state. The multi-state set can be obtained by a known algorithm which performs the deterministic transformation of a nondeterministic automaton with trace equivalence [11, 8]. For Figure 1, the multi-state set is ffs0; s1g; fs2; s3g; fs2g; fs0; s1; s4; s5g; fs5gg.Obviously, each LTS has one and only one multi-state set. After any observable sequence, a nondeterministic system reaches a unique multi-state. Thus from the test perspective, it makes sense to identify multi-states, rather than single states. This viewpoint is re ected in the FSM realm by the presentation of a nondeterministic FSM as an observable FSM [12], in which each state is a subset of states of the non-observable FSM. The viewpoint is also re ected by the refusal graphs [7], in which a node corresponds to a multi-state.

"... In PAGE 3: ... An LTS graph is shown in Figure 1. Given an LTS S = lt; S; ; ; s0 gt;, let p; q 2 S and 2 [ f g, the conventional nota- tions shown in Table1 are relevant to a given LTS, as introduced in [3]. In this paper we use M; P; S; : : : to represent LTSs; M; P; Q; : : :, for sets of states; a; b; c; : : :, for actions; and i; p; q; s : : :, for states.... ..."

### Table 1: Model Abstraction Experiments For the DMA controller, an abstraction was made on the refresh counter part of the circuit using the key value extraction method. The model for the refresh counter was shown previously in Figure 1. The refresh counter is a 128-state deterministic automaton. We reduced the state-space for this refresh counter by ab- stracting the counter into a 3-state, non-deterministic nite automaton (NFA), shown in Figure 2. The re- sulting abstract DMA controller model yields a 42 fold reduction in state-space, which enables the two system properties: memory refresh and data acknowledge to be veri ed with a 16 fold improvement in veri cation

1998

Cited by 2

### Table 1: The state variables of the update automaton

"... In PAGE 10: ... For the most part, information which has already been presented in 2.2 and Table1 will not be repeated. The machine operates nondeterministically.... ..."