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Tranlation-Lookaside Buffer Consistency

by Patricia J. Teller - ISSN 0018-9162. URL http://dx.doi.org/10.1109/2.55498 , 1990
"... translation-lookaside buffer is a dimensions of the network, so a solution to A soecial-ouruose... virtual-address TLB inconsistency should meet the needs 1 A cache rkquired to implement a paged virtual memory efficiently. Shared-memory multiprocessors with multiple TLBs, also known as translation b ..."
Abstract - Cited by 32 (1 self) - Add to MetaCart
translation-lookaside buffer is a dimensions of the network, so a solution to A soecial-ouruose... virtual-address TLB inconsistency should meet the needs 1 A cache rkquired to implement a paged virtual memory efficiently. Shared-memory multiprocessors with multiple TLBs, also known as translation

TLB Consistency on Highly-Parallel Shared-Memory Multiprocessors

by Patricia J. Teller, Richard Kenner, Marc Snir , 1987
"... Multiprocessors that store the same shared data in different private caches must ensure these caches have consistent copies. Almost all known solutions to this cache consistency problem are only suitable for architectures with a few tens of processors (PEs). Efficient solutions to the TLB (translati ..."
Abstract - Cited by 6 (0 self) - Add to MetaCart
(translation lookaside buffer) consistency problem, a special case of the cache consistency problem, can be found for highly-parallel, shared memory multiprocessors (HPSMMs) with many hundreds of PEs for the following reasons: the number of references to address translation information per modification is very

Efficient local data movement in shared-memory multiprocessor systems

by Shin-yuan Tzou, David P. Anderson, G. Scott Graham , 1987
"... The DASH research project is addressing the general problem of achiev-ing high-performance network communication in large-scale distributed systems. The efficiency of moving a large amount of data between virtual address spaces (both user and kernel) on a single machine is a major com-ponent of this ..."
Abstract - Cited by 2 (2 self) - Add to MetaCart
-ponent of this problem. Virtual memory (VM) remapping, as opposed to memory copying, is an attractive approach to moving data. However, remapping in shared-memory multiprocessors can be costly due to the problem of translation lookaside buffer (TLB) inconsistency. This paper describes the design of the DASH mechanism

Efficient Shared Memory Multiprocessing and Object-Oriented Programming

by Philip Machanick , 1996
"... Object-oriented techniques are shown to hold promise for addressing the growing speed gap between memory and processors on shared-memory multiprocessors. However, reducing cache misses can be at the expense of more misses from the translation lookaside buffer (TLB---a cache of recent page translatio ..."
Abstract - Cited by 3 (3 self) - Add to MetaCart
Object-oriented techniques are shown to hold promise for addressing the growing speed gap between memory and processors on shared-memory multiprocessors. However, reducing cache misses can be at the expense of more misses from the translation lookaside buffer (TLB---a cache of recent page

unknown title

by unknown authors
"... In modern processors, the dynamic translation of vir-tual addresses to support virtual memory is done before or in parallel with the first-level cache access. As processor technology improves at a rapid pace and the working sets of new applications grow insatiably the latency and band-width demands ..."
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on the TLB (Translation Lookaside Buffer) are getting more and more difficult to meet. The situation is worse in multiprocessor systems, which run larger appli-cations and are plagued by the TLB consistency problem. We evaluate and compare five options for virtual address translation in the context of COMAS

List of Tables...........................

by Catherine Rose, Mills Olschanowsky, Catherine Rose, Mills Olschanowsky , 2011
"... by ..."
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The Datacenter as a Computer An Introduction to the Design of Warehouse-Scale Machinesiii Synthesis Lectures on Computer Architecture Editor

by unknown authors
"... ..."
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The Datacenter as a Computer An Introduction to the Design of Warehouse-Scale Machinesiii Synthesis Lectures on Computer Architecture Editor

by unknown authors
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The Datacenter as a Computer An Introduction to the Design of Warehouse-Scale Machinesiii Synthesis Lectures on Computer Architecture Editor

by unknown authors
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Magnet: Robust and Efficient Collection through Control and Data Plane Integration

by unknown authors
"... Despite being a core networking primitive, collection protocols today often suffer from poor reliability (e.g., 70%) in practice, and heavily used protocols have never been evaluated in terms of communication efficiency. Using detailed experimental studies, we describe three challenges that cause ex ..."
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works seamlessly on top of existing low-power MAC layers. Together, these results suggest that Magnet can be the robust, efficient collection layer that so many sensor network applications and protocols need. 1
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