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Table 1 Visualisation and annotation tools to assist co-design activities

in Feature-based design in a distributed and collaborative environment
by W. D. Li A, S. K. Ong B, J. Y. H. Fuh B, Y. S. Wong B, Y. Q. Lu A, A. Y. C. Nee B 2003
"... In PAGE 2: ... In order to effectively transmit information across networks with the limited bandwidth capability and to enhance the visualisa- tion performance, 3D streaming technologies, such as the Hoops streaming toolkit [3] and the RealityWave vizStream [4], have emerged to re-organise the large number of meshes from a complex model as different Levels of Details (LODs), so as to allow them to be dispatched incrementally rather than all at once. The characteristics of some systems under this category are summarised in Table1 . These systems can support an on-line team that is concerned with a macro-view of a product, customer survey for new products and conceptual design.... ..."

Table 4: Evidence of communities for co-design as observed by the authors in the case studies

in Overcoming mass confusion: Collaborative customer co-design in online communities
by Frank Piller, Petra Schubert, Michael Koch, Kathrin Möslein
"... In PAGE 13: ... But communities may also provide support for users during their own customization process, as we will further explore in the following sections. Table4 provides an overview on the community concepts we found in the six case studies of this research. 4.... ..."
Cited by 1

Table 3 Co-design tools to share and manipulate real CAD models

in Feature-based design in a distributed and collaborative environment
by W. D. Li A, S. K. Ong B, J. Y. H. Fuh B, Y. S. Wong B, Y. Q. Lu A, A. Y. C. Nee B 2003

Table 6.1: Languages and Internal Design Representations of Co-Design meth- ods.

in A Survey of Co-Design Ideas and Methodologies by
by G. Bosman

Table 2.1: Comparisons of UML-based Co-design Flows

in ����������������� � 流�� UML-Based Rapid Prototyping Design Flow for Dynamically Reconfigurable Computing Systems
by unknown authors 2005

Table 3.1: Here the design steps supported by the co-design environments is given as compared to Delft Workbench.

in Comparative Study of VHDL Generators
by Arcilio Jaime-raul Virginia

Table 2 The parameters chosen for the SET inverter in the QCA and SET co-design simulation

in 1 2 3 4 5 6 7 8
by Rui Tang, Fengming Zhang, Yong-bin Kim

Table 5. Performance comparison with ECC/HECC scalar multiplication of related work. The first six table entries refer to pure software implementations and the rest to hardware/software co-designs.

in Hardware/Software Co-Design of Elliptic Curve Cryptography on an 8051 Microcontroller
by Manuel Koschuch, Joachim Lechner, Andreas Weitzer, Johann Großschädl, Alexander Szekely, Stefan Tillich, Johannes Wolkerstorfer
"... In PAGE 6: ... Other implementations are described in [17] and in [2,14], whereby the latter two are based on hyperelliptic curve cryptography (HECC). Detailed performance figures of all these works can be found in Table5 in Section 5. Our co-design for ECC presented in the next section also follows this approach.... In PAGE 11: ... operand transfers 2,623 Full scalar multiplication over GF(2191) 1,416,000 Table 4 shows the execution times for diverse arithmetic operations with 191-bit operands. Table5 compares the performance of ECC multiplication with related work. Systems built around an AVR microcontroller are faster than sys- tems using an 8051, which is caused by the generally better performance of AVR devices (see Appendix A).... ..."

Table 4: N vn (THz) Tn (fs) Sym. vn (THz)

in Coherent phonon spectroscopy of GaAs surfaces using time-resolved second-harmonic generation
by Yu-Ming Chang Li, Yu-ming Chang, Li Xu, Li Xu, Harry W. K. Tom, Harry W. K. Tom
"... In PAGE 19: ...scillations are shown on the left. The Fourier power spectra are shown on the right. The fits to the data are shown in dashed line in the figure and are essentially indistinguishable from the data (shown in solid line). In Table4 we list fit values of mode frequencies and dephasing times as well as the mode frequencies from HREELS data,[65] the ab initio calculation by Fritsch, et al.,[61] and a tight-binding total-energy minimization model calculation.... ..."

Table 1: SDL vs. C/VHDL co-design and simulation. This table shows clearly the benefit of using system-level specification: 1- The initial SDL specification is 10 times smaller than the produced C/VHDL model. The difference is mainly

in Hardware/Software Co-design of an ATM Network Interface Card: a Case Study
by Jean-marc Daveau, Gilberto Marchioro, Ahmed Amine Jerraya
"... In PAGE 4: ... The cycle count for software execution is based on approximation. Table1 summarizes the size of the C/VHDL code produced and the simulation and... ..."
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