Analyzing the Impact of Substrate Noise on Embedded Analog-to-Digital Converters

Analyzing the Impact of Substrate Noise on Embedded Analog-to-Digital Converters (2002)

by Yann Zinzius , Georges Gielen , Willy Sansen

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Datum	Value	Source
TITLE	Analyzing the Impact of Substrate Noise on Embedded Analog-to-Digital Converters	SVM HeaderParse 0.1
AUTHOR NAME	Yann Zinzius	user correction - Legacy Corrections
AUTHOR NAME	Georges Gielen	user correction - Legacy Corrections
AUTHOR NAME	Willy Sansen	user correction - Legacy Corrections
ABSTRACT	This paper presents the analysis and measurements of the impact of digital substrate noise on embedded Analog-to-Digital converters. The impact of substrate noise on analog design is explained, followed by a specific entire impact analysis of the impact on a regenerative comparator and an A/D converter. To confirm the analysis the substrate noise has also been measured on a test chip designed in a 0.35 m heavily--doped-substrate CMOS technology. From the measurements it was deduced that SNR and the effective number of bits are reduced by 20%.	user correction - Legacy Corrections
YEAR	2002	user correction - Legacy Corrections
CITATIONS	11 found	ParsCit 1.0