DRAM Energy Management Using Software and Hardware Directed Power Mode Control

DRAM Energy Management Using Software and Hardware Directed Power Mode Control (2001)

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by V. Delaluz , M. Kandemir , N. Vijaykrishnan , A. Sivasubramaniam , M. J. Irwin

Venue:	IN PROC. THE 7TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTER ARCHITECTURE
Citations:	44 - 10 self

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Datum	Value	Source
TITLE	DRAM Energy Management Using Software and Hardware Directed Power Mode Control	user correction
AUTHOR NAME	V. Delaluz	user correction
AUTHOR AFFIL	Microsystems Design Lab. Pennsylvania State University	user correction
AUTHOR ADDR	University Park, PA 16802	user correction
AUTHOR NAME	M. Kandemir	user correction
AUTHOR NAME	N. Vijaykrishnan	user correction
AUTHOR AFFIL	Microsystems Design Lab. Pennsylvania State University	user correction
AUTHOR ADDR	University Park, PA 16802	user correction
AUTHOR NAME	A. Sivasubramaniam	user correction
AUTHOR AFFIL	Microsystems Design Lab. Pennsylvania State University	user correction
AUTHOR ADDR	University Park, PA 16802	user correction
AUTHOR NAME	M. J. Irwin	user correction
AUTHOR AFFIL	Microsystems Design Lab. Pennsylvania State University	user correction
AUTHOR ADDR	University Park, PA 16802	user correction
ABSTRACT	While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs have not been fully explored. It has been shown that as much as 90% of overall system energy (excluding I/O) is consumed by the DRAM modules, serving as a good candidate for energy optimizations. Further, DRAM technology has also matured to provide several low energy operating modes (power modes), making it an opportunistic moment to conduct studies exploring the potential benefits of mode control techniques. This paper conducts an in-depth investigation of software and hardware techniques to avail of the DRAM mode control capabilities at a module granularity for energy savings.	user correction - Legacy Corrections
YEAR	2001	INFERENCE
VENUE	IN PROC. THE 7TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTER ARCHITECTURE	user correction
VENUE TYPE	CONFERENCE	INFERENCE
CITATIONS	20 found	ParsCit 1.0