Automata Based Symbolic Reasoning in Hardware Verification

Automata Based Symbolic Reasoning in Hardware Verification (1998)

by David Basin , Nils Klarlund

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Datum	Value	Source
TITLE	Automata Based Symbolic Reasoning in Hardware Verification	SVM HeaderParse 0.1
AUTHOR NAME	David Basin	user correction - Legacy Corrections
AUTHOR NAME	Nils Klarlund	user correction - Legacy Corrections
ABSTRACT	. We present a new approach to hardware verification based on describing circuits in Monadic Second-order Logic (M2L). We show how to use this logic to represent generic designs like n-bit adders, which are parameterized in space, and sequential circuits, where time is an unbounded parameter. M2L admits a decision procedure, implemented in the Mona tool [17], which reduces formulas to canonical automata. The decision problem for M2L is non-elementary decidable and thus unlikely to be usable in practice. However, we have used Mona to automatically verify, or find errors in, a number of circuits studied in the literature. Previously published machine proofs of the same circuits are based on deduction and may involve substantial interaction with the user. Moreover, our approach is orders of magnitude faster for the examples considered. We show why the underlying computations are feasible and how our use of Mona generalizes standard BDD-based hardware reasoning. 1. Introduction Correctnes...	user correction - Legacy Corrections
YEAR	1998	user correction - Legacy Corrections
CITATIONS	32 found	ParsCit 1.0