Limits on Interconnection Network Performance

Limits on Interconnection Network Performance (1991)

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by Anant Agarwal

Venue:	IEEE Transactions on Parallel and Distributed Systems
Citations:	166 - 4 self

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Datum	Value	Source
TITLE	Limits on Interconnection Network Performance	user correction - Legacy Corrections
AUTHOR NAME	Anant Agarwal	SVM HeaderParse 0.1
AUTHOR AFFIL	Laboratory for Computer Science; Massachusetts Institute of Technology	SVM HeaderParse 0.2
AUTHOR ADDR	Cambridge, MA 02139	SVM HeaderParse 0.1
ABSTRACT	As the performance of interconnection networks becomes increasingly limited by physical constraints in high-speed multiprocessor systems, the parameters of high-performance network design must be reevaluated, starting with a close examination of assumptions and requirements. This paper models network latency, taking both switch and wire delays into account. A simple closed form expression for contention in buffered, direct networks is derived and is found to agree closely with simulations. The model includes the effects of packet size and communication locality. Network analysis under various constraints (such as fixed bisection width, fixed channel width, and fixed node size) and under different workload parameters (such as packet size, degree of communication locality, and network request rate) reveals that performance is highly sensitive to these constraints and workloads. A twodimensional network has the lowest latency only when switch delays and network contention are ignored, but...	user correction - Legacy Corrections
YEAR	1991	INFERENCE
VENUE	IEEE Transactions on Parallel and Distributed Systems	INFERENCE
VENUE TYPE	JOURNAL	INFERENCE
PAGES	398--412	INFERENCE
VOLUME	2	INFERENCE
CITATIONS	29 found	ParsCit 1.0