The APIC Approach to High Performance Network Interface Design: Protected DMA and Other Techniques

The APIC Approach to High Performance Network Interface Design: Protected DMA and Other Techniques (1997)

by Zubin D. Dittia , Guru M. Parulkar , Jerome R. Cox, Jr.

Venue:	IN PROCEEDINGS OF INFOCOM '97
Citations:	55 - 1 self

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Datum	Value	Source
TITLE	The APIC Approach to High Performance Network Interface Design: Protected DMA and Other Techniques	INFERENCE
AUTHOR NAME	Zubin D. Dittia	user correction
AUTHOR NAME	Guru M. Parulkar	user correction
AUTHOR NAME	Jerome R. Cox, Jr.	user correction
ABSTRACT	We are building a very high performance 1.2 Gb/s ATM network interface chip called the APIC (ATM Port Interconnect Controller). In addition to borrowing useful ideas from a number of research and commercial prototypes, the APIC design embraces several innovative features, and integrates all of these pieces into a coherent whole. This paper describes some of the novel ideas that have been incorporated in the APIC design with a view to improving the bandwidth and latency seen by end-applications. Among the techniques described, Protected DMA and Protected I/O were designed to allow applications to queue data for transmission or reception directly from user-space, effectively bypassing the kernel. This argues for moving the entire protocol stack including the interface device driver into user-space, thereby yielding better latency and throughput performance than kernel-resident implementations. Pool DMA when used with Packet Splitting, is a technique that can be used to build true zero-co...	user correction - Legacy Corrections
YEAR	1997	INFERENCE
VENUE	IN PROCEEDINGS OF INFOCOM '97	user correction
VENUE TYPE	CONFERENCE	INFERENCE
PAGES	179--187	INFERENCE
CITATIONS	30 found	ParsCit 1.0