Nonlinear Array Layouts for Hierarchical Memory Systems

Nonlinear Array Layouts for Hierarchical Memory Systems (1999)

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by Siddhartha Chatterjee , Vibhor V. Jain , Alvin R. Lebeck , Shyam Mundhra , Mithuna Thottethodi

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Datum	Value	Source
TITLE	Nonlinear Array Layouts for Hierarchical Memory Systems	user correction - Legacy Corrections
AUTHOR NAME	Siddhartha Chatterjee	user correction
AUTHOR NAME	Vibhor V. Jain	user correction
AUTHOR NAME	Alvin R. Lebeck	user correction
AUTHOR NAME	Shyam Mundhra	user correction
AUTHOR NAME	Mithuna Thottethodi	user correction
ABSTRACT	Programming languages that provide multidimensional arrays and a flat linear model of memory must implement a mapping between these two domains to order array elements in memory. This layout function is fixed at language definition time and constitutes an invisible, non-programmable array attribute. In reality, modern memory systems are architecturally hierarchical rather than flat, with substantial differences in performance among different levels of the hierarchy. This mismatch between the model and the true architecture of memory systems can result in low locality of reference and poor performance. Some of this loss in performance can be recovered by re-ordering computations using transformations such as loop tiling. We explore nonlinear array layout functions as an additional means of improving locality of reference. For a benchmark suite composed of dense matrix kernels, we show by timing and simulation that two specific layouts (4D and Morton) have low implementation costs (2--5% of total running time) and high performance benefits (reducing execution time by factors of 1.1-2.5); that they have smooth performance curves, both across a wide range of problem sizes and over representative cache architectures; and that recursion-based control structures may be needed to fully exploit their potential.	user correction
YEAR	1999	user correction - Legacy Corrections
CITATIONS	63 found	ParsCit 1.0