Formal Verification of the VAMP Floating Point Unit

Formal Verification of the VAMP Floating Point Unit (2001)

by Christoph Berg , Christian Jacobi

Venue:	In CHARME 2001, volume 2144 of LNCS
Citations:	9 - 6 self

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Datum	Value	Source
TITLE	Formal Verification of the VAMP Floating Point Unit	user correction - Legacy Corrections
AUTHOR NAME	Christoph Berg	SVM HeaderParse 0.1
AUTHOR AFFIL	Saarland University; Computer Science Department	SVM HeaderParse 0.2
AUTHOR ADDR	D-66123 Saarbrucken, Germany	SVM HeaderParse 0.1
AUTHOR NAME	Christian Jacobi	SVM HeaderParse 0.1
AUTHOR AFFIL	Saarland University; Computer Science Department	SVM HeaderParse 0.2
AUTHOR ADDR	D-66123 Saarbrucken, Germany	SVM HeaderParse 0.1
ABSTRACT	We report on the formal verification of the floating point unit used in the VAMP processor. The FPU is fully IEEE compliant, and supports denormals and exceptions in hardware. The supported operations are addition, subtraction, multiplication, division, comparison, and conversions. The hardware is verified on the gate level against a formal description of the IEEE standard by means of the theorem prover PVS.	user correction - Legacy Corrections
YEAR	2001	INFERENCE
VENUE	In CHARME 2001, volume 2144 of LNCS	INFERENCE
VENUE TYPE	CONFERENCE	INFERENCE
PAGES	325--339	INFERENCE
CITATIONS	28 found	ParsCit 1.0