A simple load balancing scheme for task allocation in parallel machines

A simple load balancing scheme for task allocation in parallel machines

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by Larry Rudolph , Miriam Slivkin-allalouf

Venue:	In Proc. Symposium on Parallel Algorithms and Architectures (SPAA) (1991), ACM
Citations:	66 - 4 self

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Datum	Value	Source
TITLE	A simple load balancing scheme for task allocation in parallel machines	INFERENCE
AUTHOR NAME	Larry Rudolph	SVM HeaderParse 0.2
AUTHOR AFFIL	Department of Computer Science John Bryce Ltd.; Hebrew University, Jerusalem	SVM HeaderParse 0.2
AUTHOR ADDR	Israel Science Based Industries; and currently visiting PO BOX 23838	SVM HeaderParse 0.2
AUTHOR NAME	Miriam Slivkin-allalouf	SVM HeaderParse 0.2
AUTHOR AFFIL	and; IBM Almaden Research Center	SVM HeaderParse 0.2
AUTHOR ADDR	San Jose, Ca	SVM HeaderParse 0.2
ABSTRACT	A collection of local workpiles (task queues) and a simple load balancing scheme is well suited for scheduling tasks in shared memory parallel machines. Task scheduling on such machines has usually been done through a single, globally accessible, workpile. The scheme introduced in this paper achieves a balancing comparable to that of a global workpile, while minimizing the overheads. In many parallel computer architectures, each processor has some memory that it can access more efficiently, and so it is desirable that tasks do not mirgrate frequently. The load balancing is simple and distributed: Whenever a processor accesses its local workpile, it performs a balancing operation with probability inversely proportional to the size of its workpile. The balancing operation consists of examining the workpile of a random processor and exchanging tasks so as to equalize the size of the two workpiles. The probabilistic analysis of the performance of the load balancing scheme proves that each tasks in the system receives its fair share of computation time. Specifically, the expected size of each local task queue is within a small constant factor of the average, i.e. total number of tasks in the system divided by the number of processors. 1	SVM HeaderParse 0.2
VENUE	In Proc. Symposium on Parallel Algorithms and Architectures (SPAA) (1991), ACM	INFERENCE
VENUE TYPE	CONFERENCE	INFERENCE
PAGES	237--245	INFERENCE
CITATIONS	11 found	ParsCit 1.0