A Correctness Condition for High-Performance Multiprocessors (Extended Abstract)
Hybrid consistency, a new consistency condition for shared memory multiprocessors, attempts to cap ture the guarantees provided by contemporary high-performance architectures. It combines the exprea-siveneas of strong consistency conditions (e.g., sequen-tial consistency, linearizability) and the efficiency of weak consistency conditions (e.g., Pipelined RAM, causal memory). Memory access operations are classified as either strong or weak. A global ordering of strong operations at different processes is guaran-teed, but there is very little guarantee on the ordering of weak operations at different processes, except for what is implied by their interleaving with the strong operations. A formal and precise definition of this condition is given. An efficient implementation of hy-brid consistency on distributed memory machines is presented. In this implementation, weak operations are executed instantaneously, while the response time for strong operations is linear in the network delay. (It is proven that this is within a constant factor of the optimal time bounds.) To motivate hybrid consistency it is shown that weakly consistent memories do not support non-cooperative (in particular, non-centralized) alg~ rithms for mutual exclusion.