On-chip spiral inductors with patterned ground shields for Si-based RF IC’s

On-chip spiral inductors with patterned ground shields for Si-based RF IC’s (1998)

by C. Patrick Yue , Student Member , S. Simon Wong , Senior Member

Venue:	IEEE Journal of Solid-State Circuits
Citations:	73 - 4 self

Datum	Value	Source
TITLE	On-chip spiral inductors with patterned ground shields for Si-based RF IC’s	INFERENCE
AUTHOR NAME	C. Patrick Yue	SVM HeaderParse 0.2
AUTHOR NAME	Student Member	SVM HeaderParse 0.2
AUTHOR NAME	S. Simon Wong	SVM HeaderParse 0.2
AUTHOR NAME	Senior Member	SVM HeaderParse 0.2
ABSTRACT	Abstract — This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1–2 GHz, the addition of the shield increases the inductor quality factor up to 33 % and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz vg tank can be nearly doubled with a shielded inductor. Index Terms — Inductor, inductor model, patterned ground shield, quality factor, self-resonance, substrate loss, substrate noise coupling. I.	SVM HeaderParse 0.2
YEAR	1998	INFERENCE
VENUE	IEEE Journal of Solid-State Circuits	INFERENCE
VENUE TYPE	JOURNAL	INFERENCE
PAGES	743--752	INFERENCE
VOLUME	33	INFERENCE
CITATIONS	14 found	ParsCit 1.0