A multi-core approach to addressing the energy-complexity problem in microprocessors

A multi-core approach to addressing the energy-complexity problem in microprocessors (2003)

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by Rakesh Kumar , Keith Farkas , Partha Ranganathan , Dean M. Tullsen

Venue:	In Workshop on Complexity-Effective Design
Citations:	7 - 1 self

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Datum	Value	Source
TITLE	A multi-core approach to addressing the energy-complexity problem in microprocessors	INFERENCE
AUTHOR NAME	Rakesh Kumar	SVM HeaderParse 0.2
AUTHOR AFFIL	Department of Computer Science and Engineering; University of California, San Diego	SVM HeaderParse 0.2
AUTHOR NAME	Keith Farkas	SVM HeaderParse 0.2
AUTHOR AFFIL	¢ HP Labs	SVM HeaderParse 0.2
AUTHOR ADDR	1501 Page Mill Road; Palo Alto, CA 94304	SVM HeaderParse 0.2
AUTHOR NAME	Partha Ranganathan	SVM HeaderParse 0.2
AUTHOR AFFIL	¢ HP Labs	SVM HeaderParse 0.2
AUTHOR ADDR	1501 Page Mill Road; Palo Alto, CA 94304	SVM HeaderParse 0.2
AUTHOR NAME	Dean M. Tullsen	SVM HeaderParse 0.2
AUTHOR AFFIL	Department of Computer Science and Engineering; University of California, San Diego	SVM HeaderParse 0.2
ABSTRACT	This paper proposes single-ISA heterogeneous multicore architectures as a mechanism to reduce processor power dissipation. It assumes a single chip containing a diverse set of cores that target different performance levels and consume different levels of power. During an application’s execution, system software evaluates the resources required by an application for good performance and dynamically chooses the core that can best meet these requirements while minimizing energy consumption. It describes an example architecture with five cores of varying performance and complexity. Initial results show a more than three-fold reduction in energy at a cost of only 18 % performance. 1	SVM HeaderParse 0.2
YEAR	2003	INFERENCE
VENUE	In Workshop on Complexity-Effective Design	INFERENCE
VENUE TYPE	CONFERENCE	INFERENCE
CITATIONS	23 found	ParsCit 1.0