## Overview of Hydra: A concurrent language for synchronous digital circuit design (2002)

Venue: | In Proceedings of the 16th International Parallel and Distributed Processing Symposium. IEEE Computer |

Citations: | 12 - 0 self |

### BibTeX

@INPROCEEDINGS{O’donnell02overviewof,

author = {John T. O’donnell},

title = {Overview of Hydra: A concurrent language for synchronous digital circuit design},

booktitle = {In Proceedings of the 16th International Parallel and Distributed Processing Symposium. IEEE Computer},

year = {2002},

pages = {249--264},

publisher = {Society Press}

}

### OpenURL

### Abstract

www.dcs.gla.ac.uk/∼jtod/ Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit specification. The design language is inherently concurrent, and it offers black box abstraction and general design patterns that simplify the design of circuits with regular structure. Hydra specifications are concise, allowing the complete design of a computer system as a digital circuit within a few pages. This paper discusses the motivations behind Hydra, and illustrates the system with a significant portion of the design of a basic RISC processor.

### Citations

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(Show Context)
Citation Context ...s to be specified abstractly using named signals. Hydra offers both forms of specification [20, 22]. Several hardware description languages have been based on functional programming languages. Lustre =-=[2]-=- is a general stream processing language intended for specifying concurrent systems with synchronous communications, including hardware, and it also offers support for formal reasoning about circuits ... |

198 |
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Citation Context ...e classes for multiple circuit semantics, but the emphasis has been on verifying hardware design at the register transfer level or higher [17, 7]. Mathematical logic, in particular higher order logic =-=[10]-=-, has been used extensively to prove theorems about circuit behaviour [18, 1, 16]. The emphasis in this work is on the theorem proving, rather than on circuit design methodology, simulation, and other... |

124 |
98 Language and Libraries: The Revised Report
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Citation Context ... above were considered in the development of Hydra. The language uses a simple functional model of circuits, enabling it to be implemented by embedding within an ordinary functional language, Haskell =-=[25]-=-. Hydra is inherently concurrent, and it provides alternative semantics to allow different software tools to be applied to the same circuit specification. Finally, Hydra embodies a precise implementat... |

81 |
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Citation Context ...tions. There has been widespread interest in hardware description languages based on mathematical models of circuits. Most of the resulting languages are based on relations, functions, or logic. Ruby =-=[15]-=- is a language for specifying and reasoning about hardware, using a relational calculus to model circuit behaviour. The use of relations rather than functions to model circuits simplifies certain kind... |

55 | S.L.: Algorithms + strategy = parallelism
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Citation Context ...of parallel circuit simulators. All the function applications corresponding to components that operate in parallel can be evaluated simultaneously by a parallel implementation of Haskell, such as GPH =-=[27]-=-. Another approach, which is the subject of current research, is to define an analysis-based transformation that produces an efficient SPMD style parallel simulator from a Hydra specification. 4.4 Cir... |

48 |
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Citation Context ...ydra, a CHDL designed specifically to address the issues of concurrency, multiple semantics and behavioural models. Hydra was motivated by Johnson’s work on modeling hardware with recursion equations =-=[13]-=-, and previous papers have discussed its use of recursion equations [19], geometric design patterns [20], overloaded semantics [22], preliminary approaches to the difficult problem of netlist generati... |

43 | Observable sharing for functional circuit description
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Citation Context ...n pure functional programming languages, and this gives rise to a difficulty with generating netlists in functional CHDLs. There are several ways the problem can be solved, including pointer equality =-=[20, 5]-=- and explicit signal labeling [21]. The current version of Hydra uses a program transformation to introduce the necessary labels automatically; this allows the label 0 to be omitted from the definitio... |

31 | Microprocessor specification in Hawk
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Citation Context ...Hawk is similar to Hydra, also using stream simulation and type classes for multiple circuit semantics, but the emphasis has been on verifying hardware design at the register transfer level or higher =-=[17, 7]-=-. Mathematical logic, in particular higher order logic [10], has been used extensively to prove theorems about circuit behaviour [18, 1, 16]. The emphasis in this work is on the theorem proving, rathe... |

29 |
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Citation Context ...ifying hardware design at the register transfer level or higher [17, 7]. Mathematical logic, in particular higher order logic [10], has been used extensively to prove theorems about circuit behaviour =-=[18, 1, 16]-=-. The emphasis in this work is on the theorem proving, rather than on circuit design methodology, simulation, and other aspects of design. 8 Conclusion Hydra is a hardware description language for des... |

25 | Specifying superscalar microprocessors in Hawk
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Citation Context ...Hawk is similar to Hydra, also using stream simulation and type classes for multiple circuit semantics, but the emphasis has been on verifying hardware design at the register transfer level or higher =-=[17, 7]-=-. Mathematical logic, in particular higher order logic [10], has been used extensively to prove theorems about circuit behaviour [18, 1, 16]. The emphasis in this work is on the theorem proving, rathe... |

25 | Designing Arithmetic Circuits by Refinement in Ruby
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Citation Context ...t behaviour. The use of relations rather than functions to model circuits simplifies certain kinds of formal reasoning, and Ruby has been used extensively for circuit derivation and correctness proof =-=[14]-=-. Ruby requires all circuits to be specified using geometric combinators, and does not allow circuit topologies to be specified abstractly using named signals. Hydra offers both forms of specification... |

23 | Embedded languages for describing and verifying hardware
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(Show Context)
Citation Context ...al stream processing language intended for specifying concurrent systems with synchronous communications, including hardware, and it also offers support for formal reasoning about circuits [26]. Lava =-=[6, 4]-=- is similar to Hydra, and also provides alternative circuit semantics via overloading. The main difference is that Lava introduces “observable sharing” for netlist generation [5]. Observable sharing w... |

22 |
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Citation Context ...ated by Johnson’s work on modeling hardware with recursion equations [13], and previous papers have discussed its use of recursion equations [19], geometric design patterns [20], overloaded semantics =-=[22]-=-, preliminary approaches to the difficult problem of netlist generation [21], and applications to formal reasoning [23]. This paper gives a brief introduction 1sto the current version of Hydra, discus... |

21 | A tutorial on Lava: A hardware description and verification system
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(Show Context)
Citation Context ...al stream processing language intended for specifying concurrent systems with synchronous communications, including hardware, and it also offers support for formal reasoning about circuits [26]. Lava =-=[6, 4]-=- is similar to Hydra, and also provides alternative circuit semantics via overloading. The main difference is that Lava introduces “observable sharing” for netlist generation [5]. Observable sharing w... |

17 | Generating netlists from executable circuit specifications in a pure functional language
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(Show Context)
Citation Context ...nd previous papers have discussed its use of recursion equations [19], geometric design patterns [20], overloaded semantics [22], preliminary approaches to the difficult problem of netlist generation =-=[21]-=-, and applications to formal reasoning [23]. This paper gives a brief introduction 1sto the current version of Hydra, discusses how the key issues identified above are addressed, and illustrates how H... |

12 |
Introductory VHDL from Simulation to Synthesis
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Citation Context ...ain of hardware design. However, it is generally necessary to extend the underlying language, since some features needed to describe hardware cannot be expressed in typical imperative languages. VHDL =-=[24, 28]-=-, currently the most widely used hardware description language in industry, is based on the Ada programming language. VHDL is highly expressive, although it is relatively difficult to reason about VHD... |

11 |
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Citation Context ...ral models. Hydra was motivated by Johnson’s work on modeling hardware with recursion equations [13], and previous papers have discussed its use of recursion equations [19], geometric design patterns =-=[20]-=-, overloaded semantics [22], preliminary approaches to the difficult problem of netlist generation [21], and applications to formal reasoning [23]. This paper gives a brief introduction 1sto the curre... |

10 | Practical formal verification in microprocessor design
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Citation Context ...ifying hardware design at the register transfer level or higher [17, 7]. Mathematical logic, in particular higher order logic [10], has been used extensively to prove theorems about circuit behaviour =-=[18, 1, 16]-=-. The emphasis in this work is on the theorem proving, rather than on circuit design methodology, simulation, and other aspects of design. 8 Conclusion Hydra is a hardware description language for des... |

10 | Hardware description with recursion equations
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(Show Context)
Citation Context ... multiple semantics and behavioural models. Hydra was motivated by Johnson’s work on modeling hardware with recursion equations [13], and previous papers have discussed its use of recursion equations =-=[19]-=-, geometric design patterns [20], overloaded semantics [22], preliminary approaches to the difficult problem of netlist generation [21], and applications to formal reasoning [23]. This paper gives a b... |

7 |
Higher Order Logic and Hardware Verification, volume 31 of Cambridge Tracts
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(Show Context)
Citation Context ...l for realistic and useful circuits [23]. An advantage of this technique is that the formalism can help in producing the design, as well as in establishing its correctness. Theorem proving technology =-=[18]-=- can also be applied to Hydra circuits during the design process. 5 Design Patterns Typical circuits contain large numbers of components arranged in regular patterns. For example, the four-bit ripple ... |

4 |
A model for synchronous switching circuits and its theory of correctness
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(Show Context)
Citation Context ... synchronous model in order to achieve higher speeds without having too damaging an impact on the ability to understand and reason about designs. This section briefly summarizes the synchronous model =-=[3]-=-. All digital components are classified as either combinational or sequential. A combinational component produces one or more outputs that depend solely on the current values of the inputs; i.e. there... |

3 |
Automatic Logic Synthesis Techniques for Digital Systems
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(Show Context)
Citation Context ...2: reg[ir_d] := mem[ad] {ctl_rf_ld} 6.3 Control Circuit There are many ways to derive a control circuit from a control algorithm. Hydra supports several automatic control circuit synthesis algorithms =-=[8]-=-; a particularly simple one, called the delay element method, will be used here. The control circuit has three inputs: a system reset signal, the contents of the instruction register and the condition... |

3 |
Simulation in the Design of Digital Electronic Systems
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Citation Context ...cuit inputs as arguments, and returns the circuit outputs as results. In addition to serving as a formal definition of the circuit behaviour, the simulation functions are useful for practical testing =-=[11]-=-, since it is costly to fabricate a circuit using real hardware. Circuit simulation in Hydra is based on recursively defined systems of streams. A stream is an infinite list of values [x0, x1, x2, . .... |

2 |
Integrated Circuit Engineering: Establishing a Foundation
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(Show Context)
Citation Context ...a, including black box abstraction (Section 4), design patterns (Section 5), and the separation between datapath and control (Section 6). Digital circuits have behaviour at many levels of abstraction =-=[12]-=-, ranging from effects that depend on quantum physics (such as tunnel diodes) all the way up to large scale systems (such as multiprocessor systems). Some CHDLs attempt to cover both physical and logi... |

1 |
and Gudula Rünger. Derivation of a logarithmic time carry lookahead addition circuit
- O’Donnell
(Show Context)
Citation Context ...f recursion equations [19], geometric design patterns [20], overloaded semantics [22], preliminary approaches to the difficult problem of netlist generation [21], and applications to formal reasoning =-=[23]-=-. This paper gives a brief introduction 1sto the current version of Hydra, discusses how the key issues identified above are addressed, and illustrates how Hydra is used in practice by presenting a si... |