In-network cache coherence

In-network cache coherence (2006)

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by Noel Eisley , Li-shiuan Peh , Li Shang

Venue:	In Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Citations:	23 - 4 self

BibTeX

@INPROCEEDINGS{Eisley06in-networkcache,
    author = {Noel Eisley and Li-shiuan Peh and Li Shang},
    title = {In-network cache coherence},
    booktitle = {In Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture},
    year = {2006},
    pages = {321--332},
    publisher = {IEEE Computer Society}
}

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Abstract

Abstract — We propose implementing cache coherence protocols within the network, demonstrating how an in-network implementation of the MSI directory-based protocol allows for in-transit optimizations of read and write delay. Our results show 15 % and 24 % savings on average in memory access latency for SPLASH-2 parallel benchmarks running on a 4x4 and a 16x16 multiprocessor respectively.

Citations

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