A multi-layer, topological detailed-router is described. This is the first router ever reported that uses a rubber-band sketch (RBS) to represent the interconnect. The detailed-router is part of SURF, a routing system for multi-chip modules and VLSI that was designed to handle efficiently large multi-layer problems. The detailed-router supports various routing goals and can generate layouts for rectilinear, octilinear and any-angle wiring rules. It uses a novel approach of unconstrained layer-assignment that makes a better usage of the routing resources by considering a continuous metric of conflict between nets as opposed to the binary go/no-go approach. The layer-assignment is formulated as an optimization problem and various routing goals such as wire and via minimization or constrained-layers can be achieved by simple modifications to the cost function. The layer-assignment partitions the multi-layer problem into a set of single-layer sub-problems that are routed independently by a topological planar router.
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7271
|
Computers and Intractability - A Guide to the Theory of NP-Completeness
– Garey, Johnson
- 1979
|
|
156
|
Closest-Point problems
– SHAMOS, HOEY
- 1975
|
|
154
|
An algorithm for path connections and its applications
– Lee
- 1961
|
|
106
|
Steiner Minimal Trees
– Gilbert, Pollak
- 1968
|
|
92
|
Two algorithms for constructing the Delaunay triangulation
– Lee, Schachter
- 1980
|
|
74
|
The shortest path through a maze
– Moore
- 1959
|
|
71
|
Graph Algorithms. Computer Science
– Even
- 1979
|
|
55
|
Generalized Delaunay triangulation for planar graphs
– Lee, Lin
- 1986
|
|
35
|
The Delaunay triangulation closely approximates the complete Euclidean graph
– KEIL, GUTWIN
- 1989
|
|
24
|
River Routing Every Which Way, but Loose
– Cole, Siegel
- 1984
|
|
24
|
A computer program for optimal routing of printed circuit board connections
– Mikami, Tabuchi
- 1968
|
|
22
|
Algorithms for routing and testing routability of planar VLSI layouts
– Leiserson, Maley
- 1985
|
|
20
|
Rubber Band Routing and Dynamic Data Representation
– Dai, Kong, et al.
- 1990
|
|
18
|
Layer assignment for multi-chip modules
– Ho, Vijayan, et al.
- 1990
|
|
17
|
Optimization by Simulated Annealing
– Kirkpatric, Gelatt, et al.
- 1983
|
|
16
|
A fast multilayer general area router for MCM designs
– Khoo, Cong
- 1992
|
|
15
|
Topological routing in SURF: Generating a rubber-band sketch
– Dai, Dayan, et al.
- 1991
|
|
15
|
Optimal layer assignment for interconnect
– Pinter
- 1984
|
|
14
|
Three-dimensional routing for multilayer ceramic printed circuit boards
– Hanafusa, Yamashita, et al.
- 1990
|
|
14
|
Single-layer wire routing and compaction
– Maley
- 1990
|
|
12
|
An Iterative-Improvement Penalty-Function-Driven Wire Routing System
– Linsker
- 1984
|
|
10
|
Crosstalk-minimum layer assignment, in
– Cho
- 1993
|
|
10
|
Routability of a rubber�band sketch
– Kong�, Sato�
- 1991
|
|
10
|
Minimum-via topological routing
– Hsu
- 1983
|
|
9
|
A new approach to topological via minimization
– Sarrafzadeh, Lee
- 1989
|
|
8
|
An unconstrained topological via minimization problem for two-layer routing
– Marek-Sadowska
- 1984
|
|
8
|
River-routing: Methodology and analysis
– Pinter
- 1983
|
|
7
|
On the k-Layer planar subset and topological via minimization problems
– Cong, Liu
- 1991
|
|
7
|
Single-Layer Global Routing
– Liao, Sarrafzadeh, et al.
- 1994
|
|
6
|
Topological channel routing
– Haruyama, Wong, et al.
- 1992
|
|
6
|
Constructive routability test for planar topological routing
– Kong
- 1992
|
|
6
|
Planar subset of multi-terminal nets
– Liao, Lee, et al.
- 1990
|
|
6
|
Two-Dimensional IC Layout Compaction Based on Topological Design Rule Checking
– Valainis, Kaptanoglu, et al.
- 1990
|
|
5
|
Layer Assignment for Printed Circuit Boards and Integrated Circuits
– Joy, Ciesielski
- 1992
|
|
4
|
A faster algorithm for rubber-band equivalent transformation for planar VLSI layouts
– Chen, Lee
- 1996
|
|
3
|
A two dimensional topological compactor with octagonal geometry
– Dood, Wawrzynek, et al.
- 1991
|
|
3
|
Compaction with automatic jog introduction
– Maley
- 1986
|
|
3
|
The impact of layer assignment methods on layout algorithms for integrated circuits
– Pinter
- 1982
|
|
3
|
Geometric transformations for a rubber-band sketch
– Staepelaere
- 1992
|
|
2
|
Advances in homotopic layout compaction
– Gao, Kaufmann, et al.
- 1989
|
|
2
|
down hierarchical routing for channelless gate array based on linear assignment
– Lauther, Top
- 1987
|
|
2
|
A topological framework for compaction and routing
– Liu, Dood, et al.
- 1991
|
|
2
|
Testing homotopic routability under polygonal wiring rules, Algorithmica
– Maley
- 1996
|
|
2
|
A faster compaction algorithm with automatic jog insertion
– Mehlhorn, Naher
- 1990
|
|
2
|
Interactive terminal sliding algorithm for hybrid IC planar layout
– Murata, Kajitani
- 1994
|
|
2
|
A new hypergraph based rip-up and reroute strategy
– Raith, Bartholomeus
- 1991
|
|
2
|
Unconstrained via minimization for topological multilayer routing
– Stallmann, Hughes, et al.
- 1990
|
|
1
|
Multichip modules - an Overview
– Bruce, Meuli, et al.
- 1989
|
|
1
|
Constrained Delanuay triangulations
– Chew
- 1989
|
|
1
|
Switchbox routing with rerouting capabilities in VLSI design
– Curatelli
- 1990
|
