## Differential signaling with a reduced number of signal paths (2001)

Venue: | IEEE Trans. Circuits Syst. II |

Citations: | 7 - 1 self |

### BibTeX

@ARTICLE{Carusone01differentialsignaling,

author = {Anthony Carusone and Kamran Farzan and David A. Johns},

title = {Differential signaling with a reduced number of signal paths},

journal = {IEEE Trans. Circuits Syst. II},

year = {2001},

volume = {48},

pages = {294--300}

}

### OpenURL

### Abstract

Abstract—Differential signaling is often used for digital chip-to-chip interconnects because it provides common-mode noise rejection. Unfortunately, differential signals generally require 2 signal paths to communicate signals. In this paper, a method for differential signaling is described that requires as few as C1 signal paths for signals. Using this method, the signal values appear incrementally between neighboring matched signal paths. The technique, called incremental signaling, is similar to dicode (1) partial response signaling except that the sequence is transmitted in parallel over a bus of wires rather than sequentially in time. Theoretical and simulated bit error rates are presented for several possible implementations of an encoder/transmitter and receiver/decoder for a digital data bus including peak detection and maximum likelihood sequence detection (MLSD). Peak detection uses C1 signal paths and results in a 3-dB performance degradation with respect to independent noise compared with fully differential signaling. The Viterbi algorithm for MLSD uses C2 signal paths but provides only a 1.25 dB improvement over peak detection due to correlated noise on the (1)-coded sequence. Modified Viterbi algorithms that use C2 signal paths are introduced to cancel the correlated noise sources, resulting in a bit error rate performance comparable with fully differential signaling. Index Terms—Chip-to-chip interface, differential signaling, maximum likelihood sequence detection. I.

### Citations

138 |
The D-node Algorithm
- unknown authors
- 1984
(Show Context)
Citation Context ...onse systems, the use of an MLSD receiver provides a full 3-dB improvement in BER versus SNR. However, to achieve this 3-dB improvement, the Viterbi algorithm requires independent noise at its inputs =-=[9]-=-. In incremental systems such as Fig. 3, the receiver takes the difference (10h) between signal path values that are already noisy. Therefore, any independent noise that appears on a given signal path... |

91 |
New automatic equalizer employing modulo arithmetic
- Tomlinson
- 1971
(Show Context)
Citation Context ...partial response signals are also applicable here. III. PEAK DETECTION To keep the receiver hardware as simple as possible, the information bits can be precoded prior to transmission, as described in =-=[7]-=-. Specifically, the signal path values are encoded according to the following equation: ��CI a@�� C ��A mod v (4) 1 To minimize power consumption, differential signals are usually driven in a balanced... |

37 |
Efficient balanced codes
- Knuth
- 1986
(Show Context)
Citation Context ... high and low signals on the bus. It is well known that an x -bit binary bus can be coded on @x C���PxAbits or less to have an equal number of ones and zeros at all times. (See, for instance, [13] or =-=[14]-=-.) As long as precoding is not used at the transmitter, these codes can be combined with incremental signaling, as shown in Fig. 10. The resulting system would reject common-mode interference and mini... |

17 | Noise-predictive maximum likelihood (NPML) detection - Coker, Eleftheriou, et al. - 1998 |

14 | BiCMOS circuits for analog Viterbi decoders
- Shakiba, Johns, et al.
- 1998
(Show Context)
Citation Context ...would require an analog-to-digital converter operating on each signal path and considerable digital signal processing. Analog implementations such as those developed for magnetic storage applications =-=[8]-=- are more realistic. In some partial response systems, the use of an MLSD receiver provides a full 3-dB improvement in BER versus SNR. However, to achieve this 3-dB improvement, the Viterbi algorithm ... |

10 |
Correlative level coding and maximum-likelihood decoding
- Kobayashi
- 1971
(Show Context)
Citation Context ... 111“ is finite in length, so is the trellis diagram. Furthermore, it is known that the initial and final states of the correct path through the trellis must both be 0. Following the approach used in =-=[15]-=- we seek €�@�A, the probability that an adversary path from � a � to � a � C � which follows the state trajectory ‘ �� ��CI 111 ��C� “ will be chosen over the correct path with state trajectory ‘ �� �... |

9 | Correlation-sensitive adaptive sequence detection
- Kavčić, Moura
- 1998
(Show Context)
Citation Context ...ic storage systems where correlated noise is introduced by the magnetic media and by the receive equalizer. Several solutions have been proposed for magnetic storage systems. (See, for instance, [10]–=-=[12]-=-.) Generally, the approach taken is to cancel the correlated noise on each sample using a linear noise prediction filter. These techniques, sometimes called noise-predictive maximum likelihood detecti... |

8 |
Improvements in detectors based upon colored noise
- Altekar, Wolf
- 1998
(Show Context)
Citation Context ...agnetic storage systems where correlated noise is introduced by the magnetic media and by the receive equalizer. Several solutions have been proposed for magnetic storage systems. (See, for instance, =-=[10]-=-–[12].) Generally, the approach taken is to cancel the correlated noise on each sample using a linear noise prediction filter. These techniques, sometimes called noise-predictive maximum likelihood de... |

8 |
The Viterbi algorithm applied to digital data transmission
- Hayes
- 2002
(Show Context)
Citation Context ...nus the metric of the correct path is �� a �C� �a�CI @˜� � @�A 0 ˜� � @�AAX (21) Assuming the Euclidean squared error of the detected sequence is to be minimized, a suitable branch metric is given by =-=[16]-=-. ˜��@�A a@� 0 �A�� 0 @� 0 �A P eX (22) The path “closest” to the correct one will deviate from it at � a �CI, then run parallel to it until � a �0I. If only the closest adversary path is considered (... |

3 |
Balanced codes with parallel encoding and decoding
- Tallini, Bose
- 1999
(Show Context)
Citation Context ...umber of high and low signals on the bus. It is well known that an x -bit binary bus can be coded on @x C���PxAbits or less to have an equal number of ones and zeros at all times. (See, for instance, =-=[13]-=- or [14].) As long as precoding is not used at the transmitter, these codes can be combined with incremental signaling, as shown in Fig. 10. The resulting system would reject common-mode interference ... |

2 |
A 1.2 m CMOS differential I/O system capable of 400 Mbps transmission rates
- Rivard, Smith
- 1992
(Show Context)
Citation Context ...ial signals effectively reject common-mode noise and even-order distortion terms. Since common-mode noise is prevalent on matched PCB traces, differential signaling is effective for both voltage [1], =-=[2]-=- and current-mode [3] digital chip-to-chip interfaces. Fully differential signals are now used in the scalable coherent interface [4], [5] and RamLink [6] standards. Unfortunately, a practical problem... |

1 |
A 1.2 "m CMOS differential I/O system capable of 400 Mbps transmission rates
- Rivard, Smith
- 1992
(Show Context)
Citation Context ...ial signals effectively reject common-mode noise and even-order distortion terms. Since common-mode noise is prevalent on matched PCB traces, differential signaling is effective for both voltage [1], =-=[2]-=- and current-mode [3] digital chip-to-chip interfaces. Fully differential signals are now used in the scalable coherent interface [4], [5] and RamLink [6] standards. Unfortunately, a practical problem... |

1 |
Current mode transceiver logic, (Cmtl) for reduced swing CMOS, chip to chip communication
- Quigley, Caravella, et al.
- 1993
(Show Context)
Citation Context ...ly reject common-mode noise and even-order distortion terms. Since common-mode noise is prevalent on matched PCB traces, differential signaling is effective for both voltage [1], [2] and current-mode =-=[3]-=- digital chip-to-chip interfaces. Fully differential signals are now used in the scalable coherent interface [4], [5] and RamLink [6] standards. Unfortunately, a practical problem with their implement... |

1 |
the high-level synthesis of the targeted class of A/D and D/A converters is covered, but the layout generation part is left to the designer. The AMGIE environment proposed in [6] automates the complete flow, from specifications over sizing synthesis down
- Vandenbussche, Plas, et al.
(Show Context)
Citation Context ...es, differential signaling is effective for both voltage [1], [2] and current-mode [3] digital chip-to-chip interfaces. Fully differential signals are now used in the scalable coherent interface [4], =-=[5]-=- and RamLink [6] standards. Unfortunately, a practical problem with their implementation is that two signal paths are required for each signal. For example, using fully differential signals for a 64-b... |