Using the NS-2 Network Simulator for Evaluating Network on Chips (NoC)

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Using the NS-2 Network Simulator for Evaluating Network on Chips (NoC)

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by Muhammad Ali , Michael Welzl , Awais Adnan , Farrukh Nadeem

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BibTeX

@MISC{Ali_usingthe,
    author = {Muhammad Ali and Michael Welzl and Awais Adnan and Farrukh Nadeem},
    title = {Using the NS-2 Network Simulator for Evaluating Network on Chips (NoC)},
    year = {}
}

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Abstract

Abstract: Networks on chips (NoCs) have been introduced as a remedy for the growing problems of current interconnects in VLSI chips. Being a relatively new domain in research, simulation tools for NoCs are scarce. To fill the gap, we use network simulator NS-2 for simulating NoCs, especially at high level chip design. The huge library of network elements along with its flexibility to accommodate customized designs, NS-2 becomes a viable choice for NoCs. We have used NS-2 to simulate our prototype of a fault tolerant protocol for NoCs. Key words: Network on chips (NoCs), Network Simulator (ns-2), simulation and modeling

Keyphrases

ns-2 network simulator evaluating network high level chip design vlsi chip simulation tool current interconnects viable choice new domain network element network simulator huge library network simulator ns-2 key word fault tolerant protocol customized design

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