Abstract

performance potential of fast processors, programmers The wide-spread use of microprocessor based systems must explicitly consider cache behavior, restructuring their that utilize cache memory to alleviate excessively long codes to increase locality. DRAM access times introduces a new dimension in the As fast processors proliferate, techniques for improving quest to obtain good program performance. To fully cache performance must move beyond the supercomputer, exploit the performance potential of these fast processors, multiprocessor, and academic research communities and programmers must reason about their program’s cache into the mainstream of computing. To expedite this trans-performance. Heretofore, this topic has been restricted to fer of knowledge, as part of the CURIOUS (Center for the supercomputer, multiprocessor, and academic research Undergraduate education and Research: Integration community. It is now time to introduce this topic into thrOUgh performance and viSualization) project at Duke undergraduate computer science curriculum.

Citations