MPEG Decoding Workload Characterization (2003)
| Venue: | in Proceedings of Workshop on Computer Architecture Evaluation Using Commercial Workloads |
| Citations: | 6 - 2 self |
BibTeX
@INPROCEEDINGS{Holliman03mpegdecoding,
author = {Matthew J. Holliman and Eric Q. Li and Yen-kuang Chen},
title = {MPEG Decoding Workload Characterization},
booktitle = {in Proceedings of Workshop on Computer Architecture Evaluation Using Commercial Workloads},
year = {2003}
}
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Abstract
Abstract-- Media workloads have been a principal driving force behind processor designs for several years. While MPEG decoding has been extensively studied in the past, it continues to gain importance as a key workload underlying many present and emerging applications. Additionally, the emerging video coding standard MPEG-4 Part 10, also known as H.264, has some new features that impact the whole system performance. In this paper, we address the characterization of MPEG as well as H.264 decoding on current state-of-the-art superscalar and simultaneous multithreaded (SMT) micro-architectures, discussing both application-level behavior and the key kernels in the applications, e.g., variable-length decoding, IDCT, deblocking filter, and motion compensation. We also address the effectiveness of a number of current micro-architectural enhancements for speeding up this workload. Index Terms—multimedia, video codecs, MPEG, H.264, microprocessor, simultaneous multithreading
