Abstract

The present paper can be seen as an exercise in the author’s stream calculus [Rut01] and gives a new proof for an existing result about stream circuits. Such circuits are also known under the name of signal flow graphs, and are built from (scalar) multipliers, copiers (fan-out), adders (element-wise sum), and registers (here: one-element memory cells, aka delays). Because of the presence of memory, the input-output behaviour of these circuits is best described in terms of functions from streams to streams (of real numbers). The main statement of this paper (Theorem 6), gives a characterization of the input-output behaviour of finite stream circuits in terms of so-called rational streams. It is well-known in the world of signal processing, where it is formulated and proved in terms of the Z-transform (a discrete version of the Laplace transform) and transfer functions (see for instance [Lah98, p.694]). These transforms are used as representations of streams of (real or complex) numbers. As a consequence, one has to deal with two different worlds, and some care is required when moving from the one to the other. In contrast, we use stream calculus to formulate and obtain

Citations