Abstract

Floor-planning is a fundamental step in VLSI chip design. Based upon the concept of orderly spanning trees, we present a simple O(n)-time algorithm to construct a oorplan for any n-node plane triangulation. In comparison with previous oor-planning algorithms in the literature, our solution is not only simpler in the algorithm itself, but also produces oor-plans which require fewer module types. An equally important aspect of our new algorithm lies in its ability to t the oor-plan area in a rectangle of size (n 1) . Lower bounds on the worst-case area for oor-planning any plane triangulation are also provided in the paper.

Citations