Full-Chip Subthreshold Leakage Power Prediction and Reduction Techniques for Sub-0.18-μm CMOS (2004)

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by Siva Narendra , Vivek De , Shekhar Borkar , Dimitri A. Antoniadis , Anantha P. Chandrakasan , Anantha P. Ch
Venue:IEEE Journal of Solid-State Circuits
Citations:29 - 2 self