Analytical Modeling and Reduction of Direct Tunneling Current during Behavioral Synthesis of Nanometer CMOS Circuits (2005)

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by Saraju P. Mohanty , Valmiki Mukherjee , Ramakrishna Velagapudi
Venue:in Proceedings of the 14th ACM/IEEE International Workshop on Logic and Synthesis (IWLS
Citations:5 - 5 self