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Compiler-optimized Usage of Partitioned Memories (2004)
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| Venue: | In Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI2004 |
| Citations: | 18 - 2 self |
BibTeX
@INPROCEEDINGS{Wehmeyer04compiler-optimizedusage,
author = {Lars Wehmeyer and Urs Helmig and Peter Marwedel},
title = {Compiler-optimized Usage of Partitioned Memories},
booktitle = {In Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI2004},
year = {2004}
}
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Abstract
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use of caches in the memory hierarchy, processor cores today also include small onchip memories called scratchpad memories whose usage is not controlled by hardware, but rather by the programmer or the compiler. Techniques for utilization of these scratchpads have been known for some time. Some new processors provide more than one scratchpad, making it necessary to enhance the workflow such that this complex memory architecture can be efficiently utilized. In this work, we present an energy model and an ILP formulation to optimally assign memory objects to different partitions of scratchpad memories at compile time, achieving energy savings of up to 22% compared to previous approaches.
Keyphrases
partitioned memory compiler-optimized usage scratchpad memory small onchip memory well-known use ilp formulation energy consumption memory hierarchy compile time new processor new memory architecture processor core today different partition energy model energy saving previous approach embedded system memory object complex memory architecture
