Statistical Timing Analysis Using Bounds (2003)
| Venue: | ACM/IEEE Design, Automation and Test in Europe Conference and Exhibition |
| Citations: | 11 - 0 self |
BibTeX
@INPROCEEDINGS{Agarwal03statisticaltiming,
author = {Aseem Agarwal and David Blaauw and Vladimir Zolotov and Sarma Vrudhula},
title = {Statistical Timing Analysis Using Bounds},
booktitle = {ACM/IEEE Design, Automation and Test in Europe Conference and Exhibition},
year = {2003},
pages = {62--67}
}
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Abstract
The gr wing impact of within-dieprthin varE9]CM hascrM:]E the needfor statistical timing analysis,wher gate delaysar modeled asrME]9 varC[j9Mk Statistical timing analysis hastr:)):)Mk)G4 sufferE fr exponentialrp time complexity withcirM:: size, due to the dependenciescrpend byrMj[ ver ging paths in thecir:[jE In thispaper , weprEG)9 a newappr:9M to statistical timing analysis which uses statistical bounds.Firds we pr vide afor9[ definition of the statistical delay of acirC:[ and der ve a statistical timing analysis methodfrh this definition. Since this methodfor finding the exact statistical delay has exponentialrp time complexity with cir cuit size, we alsoproMjC a new methodfor computing statistical bounds which haslinear rn time complexity. Wepr ve thecor:]CE ness of theprME9[: bounds. Since we pr vide both a lower and upper bound on the trM statistical delay, we candeter9C: the quality of the bounds. TheprMjjGG methodswer implemented and tested onbenchmar cirhmar ThereMj]9 demonstrk: that the prM posed bounds have only a small erll .
Citations
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| 13 | Predicting circuit performance using circuit-level statisticaltiming analysis - Brawhear, Menezes, et al. - 1994 |
| 7 | A Neutral Netlist of 10 - Brglez, Fujiwara |
| 6 | A new statistical approach to timing analysis of VLSI circuits - Lin, Wu - 1998 |
| 5 | Statistical timing analysis of combinational circuits - Jyu, Malik, et al. - 1993 |
| 4 | Timing analysis for nMOS - Jouppi - 1983 |
| 2 | Fast Statistical Timing Analysis - Liou, Cheng, et al. |
