Low-Swing On-Chip Signaling Techniques: Effectiveness and Robustness

Low-Swing On-Chip Signaling Techniques: Effectiveness and Robustness (2000)

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by Hui Zhang , Varghese George , Jan M. Rabaey

Venue:	IEEE TRANSACTIONS ON VLSI SYSTEMS
Citations:	38 - 2 self

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@ARTICLE{Zhang00low-swingon-chip,
    author = {Hui Zhang and Varghese George and Jan M. Rabaey},
    title = {Low-Swing On-Chip Signaling Techniques: Effectiveness and Robustness},
    journal = {IEEE TRANSACTIONS ON VLSI SYSTEMS},
    year = {2000},
    volume = {8},
    number = {3},
    pages = {264--272}
}

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Abstract

This paper reviews a number of low-swing on-chip interconnect schemes and presents a thorough analysis of their effectiveness and limitations, especially on energy efficiency and signal integrity. In addition, several new interface circuits presenting even more energy savings and better reliability are proposed. Some of these circuits not only reduce the interconnect swing, but also use very low supply voltages so as to obtain quadratic energy savings. The performance of each of the presented circuits is thoroughly examined using simulation on a benchmark interconnect circuit. Significant energy savings up to a factor of six have been observed.

Citations

151	Limited-Weight Codes for Low-Power I/O - Stan, Burleson - 1994
136	Digital integrated circuits - Rabaey - 1996
72	Digital Systems Engineering - Dally, Poulton - 1998
35	High-Efficiency Low-Voltage DC-DC Conversion for Portable Applications - Stratakos - 1998
20	Low-Swing Interconnect Interface Circuits - Zhang, Rabaey - 1998
11	Analysis and Circuit Design for Low Power Programmable Logic Modules - Kusse - 1997
7	et al., “Power Consumption Estimation in CMOS VLSI Chips - Liu - 1994
5	et al. “Sub-1-V Swing Internal Bus Architecture for Future Low-Power ULSI’s,” in - Nakagome - 1993
5	et al., “An Asymptotically Zero Power Charge-Recycling Bus Architecture for Battery-Operated Ultrahigh Data Rate ULSI’s - Yamauchi - 1995
4	A novel reduced swing CMOS BUS interface circuit for high speed low power VLSI systems - Colshan, Jaroun - 1994
4	Energy efficient processor system design - Burd - 1998
3	et al., “Working-zone encoding for reducing the energy in microprocessor address buses - Musoll - 1998
3	et al., “Data-dependent logic swing internal bus architecture for ultralow-power LSI’s - Hiraki - 1995
1	et al., “A CMOS low-voltage-swing transmission-line transceiver - Gunning - 1992