Automatic Verification of the SCI Cache Coherence Protocol (1995)
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| Venue: | In Correct Hardware Design and Verification Methods: IFIP WG10.5 Advanced Research Working Conference Proceedings |
| Citations: | 41 - 16 self |
BibTeX
@INPROCEEDINGS{Stern95automaticverification,
author = {Ulrich Stern and David L. Dill},
title = {Automatic Verification of the SCI Cache Coherence Protocol},
booktitle = {In Correct Hardware Design and Verification Methods: IFIP WG10.5 Advanced Research Working Conference Proceedings},
year = {1995},
pages = {21--34}
}
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Abstract
. This paper describes an ongoing effort to verify the cache coherence protocol of the IEEE/ANSI Standard for Scalable Coherent Interface using the Mur' verification system. A model of the typical set protocol was constructed in the Mur' description language. This model was augmented with a specification of properties necessary for cache coherence. The Mur' verification system automatically checks if all reachable states in the model satisfy the given specification. Although verification is still under way, we have already found several errors in the C-code defining the protocol. Finally, we elucidate the experiences gained in the verification project. 1 Introduction The IEEE/ANSI Standard for Scalable Coherent Interface (SCI) includes a cache coherence protocol for distributed shared-memory multiprocessors. Designing a complex protocol -- like this cache coherence protocol -- is a challenging and difficult task. It is very hard for a designer to predict all possible interactions amon...
