## A Survey of Power Estimation Techniques in VLSI Circuits (1994)

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Venue: | IEEE Transactions on VLSI Systems |

Citations: | 241 - 16 self |

### BibTeX

@ARTICLE{Najm94asurvey,

author = {Farid N. Najm},

title = {A Survey of Power Estimation Techniques in VLSI Circuits},

journal = {IEEE Transactions on VLSI Systems},

year = {1994},

volume = {2},

pages = {446--455}

}

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### Abstract

With the advent of portable and high-density microelectronic devices, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and efficient power estimation during the design phase is required in order to meet the power specifications without a costly redesign process. In this paper, we present a review/tutorial of the power estimation techniques that have recently been proposed. Invited, IEEE Trans. on VLSI, Dec. 1994. 1. Introduction The continuing decrease in feature size and the corresponding increase in chip density and operating frequency have made power consumption a major concern in VLSI design [1, 2]. Modern microprocessors are indeed hot: the PowerPC chip from Motorola consumes 8.5 Watts, the Pentium chip from Intel consumes 16 Watts, and DEC's alpha chip consumes 30 Watts. Excessive power dissipation in integrated circuits not only discourages their use in a portable environment, but also causes overheating, which degr...

### Citations

3132 | Graph-based algorithms for boolean function manipulations
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- 1986
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Citation Context ...ependence assumption is to make the computed density values insensitive to the internal circuit delays. Yet another probabilistic approach was presented in [28], where Binary Decision Diagrams (BDDs) =-=[35]-=- were used to take into account internal node correlations and toggle power, at the cost of increased computation. This approach can become computationally expensive, especially for circuits where tog... |

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Citation Context ...ndants. Thus a depth-first-traversal of the BDD, with a post-order evaluation of P (\Delta) at every node is all that is required. This can be implemented using the "scan" function of the BD=-=D package [36]-=-. 4.2. Probabilistic Simulation (CREST) This approach [20--22] requires the user to specify typical signal behavior at the circuit inputs using probability waveforms. A probability waveform is a seque... |

464 | Low-power CMOS digital design
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Citation Context ...I, Dec. 1994. 1. Introduction The continuing decrease in feature size and the corresponding increase in chip density and operating frequency have made power consumption a major concern in VLSI design =-=[1, 2]-=-. Modern microprocessors are indeed hot: the PowerPC chip from Motorola consumes 8.5 Watts, the Pentium chip from Intel consumes 16 Watts, and DEC's alpha chip consumes 30 Watts. Excessive power dissi... |

169 |
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- 1984
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Citation Context ...ed by the combinational logic blocks. This provides a convenient way to decouple the -2problem and simplify the analysis. And, finally, it is commonly accepted that, in accordance with the results of =-=[7]-=-, it is enough to consider only the charging/discharging current drawn by a logic gate, so that the short-circuit current during switching is neglected. out out in y y x in x x 0 x 1 x 2 x 0 x 1 x 2 y... |

162 | Transition Density: A New Measure of Activity in Digital Circuits
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- 1992
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Citation Context ...ing to: P t (x) = 2P s (x)P s (x) = 2P s (x) [1 \Gamma P s (x)] (2) We refer to this as a temporal independence assumption. Other recent power measures are based on the transition density formulation =-=[10, 25]-=-. The transition density at node x is the average number of transitions per second at node x, denoted D(x). Formally: Definition 3. (transition density) If a logic signal x(t) makes n x (T ) transitio... |

111 |
Probabilistic Treatment of General Combinational Networks
- Parker, McCluskey
- 1975
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Citation Context ...ion of clock cycles in which the steady state value of x is different from its initial value. The signal probability is a relatively old concept that was first introduced to study circuit testability =-=[9]-=-. It is important to note that both these probability measures are unaffected by the circuit internal delays. Indeed, they remain the same even if a zero-delay timing model is used. When this is done,... |

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- 1991
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Citation Context ...ing to: P t (x) = 2P s (x)P s (x) = 2P s (x) [1 \Gamma P s (x)] (2) We refer to this as a temporal independence assumption. Other recent power measures are based on the transition density formulation =-=[10, 25]-=-. The transition density at node x is the average number of transitions per second at node x, denoted D(x). Formally: Definition 3. (transition density) If a logic signal x(t) makes n x (T ) transitio... |

92 | Estimation of Average Switching Activity in Combinational and Sequential Circuits
- Ghosh, Devadas, et al.
- 1992
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Citation Context ...tion 4. Nevertheless, the result of this independence assumption is to make the computed density values insensitive to the internal circuit delays. Yet another probabilistic approach was presented in =-=[28]-=-, where Binary Decision Diagrams (BDDs) [35] were used to take into account internal node correlations and toggle power, at the cost of increased computation. This approach can become computationally ... |

85 |
On Average Power Dissipation and Random Pattern Testability of CMOS Combinational Logic Networks
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- 1992
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Citation Context ...r by the designer, they are not necessarily design errors. Only in the context of low-power design do they become a nuisance, because of the additional power that they dissipate. It has been observed =-=[8]-=- that this additional power dissipation is typically 20% of the total power, but can be as high as 70% of the total power in some cases such as combinational adders. We have observed that in a 16-bit ... |

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71 | Markovian Analysis of Large Finite State
- Hachtel, Macii, et al.
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Citation Context ...e lines using the Chapman-Kolmogorov equations [33, 34], which is computationally too expensive. Another approach that also attempts a direct solution of the Chapman-Kolmogorov equations was given in =-=[41]-=-. While it is more efficient, it remains quite expensive, so that the largest test case presented contains less than 30 latches. Better solutions are offered by two recent papers [42, 43], which are b... |

59 |
Accurate Simulation of Power Dissipation in VLSI Circuits
- Kang
- 1986
(Show Context)
Citation Context ...ng the various recently proposed power estimation techniques. 3. Brief Overview The earliest proposed techniques of estimating power dissipation were strongly patterdependent circuit simulation based =-=[11, 12]-=-. One would simulate the circuit while monitoring the supply voltage and current waveforms, which are subsequently used to compute the average power. Besides being strongly pattern dependent, these te... |

54 | Estimation of power dissipation in CMOS combinational circuits using boolean function manipulation - Devadas, Keutzer, et al. - 1992 |

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Citation Context ...ons was given in [41]. While it is more efficient, it remains quite expensive, so that the largest test case presented contains less than 30 latches. Better solutions are offered by two recent papers =-=[42, 43]-=-, which are based on solving a non-linear system that gives the present state line probabilities, as follows. Let a vector of input probabilities P in = [p 1 ; p 2 ; : : : ; p n ] be applied to the co... |

44 |
Statistical estimation of the switching activity
- Xakellis, Najm
- 1994
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Citation Context ...e same accuracy) the power of individual gates, because some gates may switch very infrequently. This point will be further clarified below. 5.2. Power of individual gates (MED) This recent technique =-=[32]-=- is a modification of the McPower approach that provides both the total and individual-gate power estimates, with user-specified accuracy and confidence. One reason why one may want to estimate the po... |

43 | Efficient Estimation of Dynamic Power Consumption under Real Delay Model
- Tsui, Pedram, et al.
- 1993
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Citation Context ...orms, as described in more detail in the next section. This approach assumed spatial independence, and was not restricted to only synchronous circuits. Improvements on this technique were proposed in =-=[23, 24]-=-, where the accuracy and the correlation handling were improved upon. Another probabilistic approach was proposed in [25--27], where the transition density measure of circuit activity was introduced. ... |

43 |
Random variables, and Stochastic Process, 2nd Edition
- Papoulis, Probability
- 1984
(Show Context)
Citation Context ...tial to the approach. The simplest way to propagate probabilities is to work with a gate-level description -8of the circuit. Thus if y = AND(x 1 ; x 2 ), then it follows from basic probability theory =-=[34]-=- that P s (y) = P s (x 1 )P s (x 2 ), provided x 1 and x 2 are (spatially) independent. Similarly, other simple expressions can be derived for other gate types. Once the signal probabilities are compu... |

42 |
Estimating Dynamic Power Consumption of CMOS Circuits
- Cirit
- 1987
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Citation Context ... of this section, therefore, we will be concerned with the power consumed in a combinational circuit whose inputs switch in synchrony. The use of probabilities to estimate power was first proposed in =-=[19]-=-. In this work, a zero-delay model was assumed and a temporal independence assumption was made so that the transition probabilities could be estimated using signal probabilities based on (2). Signal p... |

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- 1994
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Citation Context ...ons was given in [41]. While it is more efficient, it remains quite expensive, so that the largest test case presented contains less than 30 latches. Better solutions are offered by two recent papers =-=[42, 43]-=-, which are based on solving a non-linear system that gives the present state line probabilities, as follows. Let a vector of input probabilities P in = [p 1 ; p 2 ; : : : ; p n ] be applied to the co... |

34 | Improving the accuracy of circuit activity measurement
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Citation Context ... a general Boolean function, Binary Decision Diagrams can be used [25] to compute the Boolean difference probabilities. Recently, specialized BDDbased techniques have been proposed to facilitate this =-=[39]-=-. 4.4. Using a BDD The technique proposed in [28] attempts to handle both spatial and temporal correlations by using a BDD to represent the successive Boolean functions at every node in terms of the -... |

31 | Crest - a current estimator for cmos circuits - Najm, Burch, et al. - 1988 |

29 | Pattern independent current estimation for reliability analysis of CMOS circuits - Burch, Najm, et al. - 1988 |

25 | Estimation of maximum currents in MOS IC logic circuits - Chowdury, Barkatullah - 1990 |

25 | Time Domain Current Waveform Simulation of - Deng, Shiau, et al. - 1988 |

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Citation Context ...ng the various recently proposed power estimation techniques. 3. Brief Overview The earliest proposed techniques of estimating power dissipation were strongly patterdependent circuit simulation based =-=[11, 12]-=-. One would simulate the circuit while monitoring the supply voltage and current waveforms, which are subsequently used to compute the average power. Besides being strongly pattern dependent, these te... |

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16 |
On the complexity of using bdds for the synthesis and analysis of boolean circuits
- Chakravarty
- 1989
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Citation Context ...is built from Boolean components that are not part of a predefined gate library, the signal probability can be computed by using a BDD [35] to represent the Boolean functions, as proposed in [10] and =-=[37]-=-. As an example to illustrate the BDD representation, consider the Boolean function y = x 1 x 2 + x 3 , which can be represented by the BDD shown in Fig. 3. The Boolean variables x i are ordered, and ... |

15 | Power dissipation analysis of CMOS VLSI circuits by means of switch-level simulation - Huizer - 1990 |

14 |
private communication
- Brodersen, Emmons
- 1976
(Show Context)
Citation Context ...I, Dec. 1994. 1. Introduction The continuing decrease in feature size and the corresponding increase in chip density and operating frequency have made power consumption a major concern in VLSI design =-=[1, 2]-=-. Modern microprocessors are indeed hot: the PowerPC chip from Motorola consumes 8.5 Watts, the Pentium chip from Intel consumes 16 Watts, and DEC's alpha chip consumes 30 Watts. Excessive power dissi... |

14 |
Improved Techniques for Probabilistic Simulation including Signal Correlation Effects
- Stamoulis, Hajj
- 1993
(Show Context)
Citation Context ...orms, as described in more detail in the next section. This approach assumed spatial independence, and was not restricted to only synchronous circuits. Improvements on this technique were proposed in =-=[23, 24]-=-, where the accuracy and the correlation handling were improved upon. Another probabilistic approach was proposed in [25--27], where the transition density measure of circuit activity was introduced. ... |

14 |
The probability of error detection in sequential circuits using random test vectors
- Ismaeel, Breuer
- 1991
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Citation Context ...ll of which make use of the above Markov assumption. Some of these compute only the probabilities (signal -16and transition) at the latch outputs, while others also compute the power. The approach in =-=[40]-=- solves directly for the transition probabilities on the present state lines using the Chapman-Kolmogorov equations [33, 34], which is computationally too expensive. Another approach that also attempt... |

13 | PowerPlay - Fast Dynamic Power Estimation Based on Logic Simulation - Krodel |

11 | Power dissipation estimate by switch level simulation - Tjarnstrom - 1989 |

10 | A Novel Approach to Cost Effective Estimate of Power Dissipation in CMOS IC’s - Benini, Favalli, et al. - 1993 |

9 |
Estimation of Average Switching Activity inCombinational and Sequential Circuits
- Ghosh, Devadas, et al.
- 1992
(Show Context)
Citation Context ...tion 4. Nevertheless, the result of this independence assumption is to make the computed density values insensitive to the internal circuit delays. Yet another probabilistic approach was presented in =-=[28]-=-, where Binary Decision Diagrams (BDDs) [35] were used to take into account internal node correlations and toggle power, at the cost of increased computation. This approach can become computationally ... |

7 | SIMCURRENT-An efficient program for the estimation of the current flow of complex CMOS circuits - Jagau - 1988 |

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A methodology for e cient estimation of switching activity in sequential logic circuits
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Citation Context ...ations was given in [41]. While it is more e cient, it remains quite expensive, so that the largest test case presented contains less than 30 latches. Better solutions are o ered by two recent papers =-=[42, 43]-=-, which are based on solving a non-linear system that gives the present state line probabilities, as follows. Let a vector of input probabilities P in =[p 1;p 2;:::;p n] be applied to the combinationa... |

6 | Simulation and reduction of CMOS power dissipation at logic level - Lanches, Baitinger - 1993 |

6 | Improved estimation of the switching activity for reliability prediction in VLSI circuits - Najm - 1994 |

6 | SIMCURRENT - An E cient Program for the Estimation of the Current Flow of Complex CMOS Circuits - Jagau - 1990 |

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Probabilistic analysis of large nite state machines
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- 1994
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Citation Context ...e lines using the Chapman-Kolmogorov equations [33, 34], which is computationally too expensive. Another approach that also attempts a direct solution of the Chapman-Kolmogorov equations was given in =-=[41]-=-. While it is more e cient, it remains quite expensive, so that the largest test case presented contains less than 30 latches. Better solutions are o ered by two recent papers [42, 43], which are base... |

5 |
Probability and Statistics for Engineers, 3rd edition
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- 1985
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Citation Context ...e simulations and how to decide when the measured power has converged close enough to the true average power. Normally, -13the inputs are randomly generated and statistical mean estimation techniques =-=[38]-=- are used to decide when to stop, essentially a Mont'e Carlo method. We will review the two main approaches that have been proposed, whose characteristics are compared in Table 2. Table 2. Statistical... |

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Probability and Statistics for Engineers, 3rd edition. Englewood Cli s, NJ
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- 1985
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Citation Context ... simulations and how to decide when the measured power has converged close enough to the true average power. Normally, -13the inputs are randomly generated and statistical mean estimation techniques =-=[38]-=- are used to decide when to stop, essentially a Monte Carlo method. We will review the two main approaches that have been proposed, whose characteristics are compared in Table 2. Approach Handle Toggl... |

3 | A novel approach to cost-e ective estimate of power dissipation in CMOS ICs," European Design Automation Conference - Benini, Favalli, et al. - 1993 |