## Hierarchical Symbolic Analysis of Analog Integrated Circuits via Determinant Decision Diagrams (2000)

Venue: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.19, Apr 2000 |

Citations: | 2 - 0 self |

### BibTeX

@INPROCEEDINGS{Tan00hierarchicalsymbolic,

author = {Xiang-dong Tan and C. -j. Richard Shi and Senior Member},

title = {Hierarchical Symbolic Analysis of Analog Integrated Circuits via Determinant Decision Diagrams},

booktitle = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.19, Apr 2000},

year = {2000},

pages = {401}

}

### OpenURL

### Abstract

A new approach is proposed to hierarchical symbolic analysis of large analog integrated circuits. It consists of performing symbolic suppression of each subcircuit to its terminals in terms of subcircuit matrix determinants and cofactors, and applying Cramer's rule to solve symbolically the set of equations at the top level of the circuit hierarchy. The novelty of the proposed approach is to use an annotated, directed and acyclic graph, called Determinant Decision Diagram (DDD), to represent symbolic determinants of subcircuit matrices and cofactors used in subcircuit suppression, as well as symbolic determinants of the top-level circuit matrix and cofactors required in applying Cramer's rule. DDD enables systematically exploiting the inherent sparsity of circuit matrices and the sharing of symbolic expressions. It is capable of representing a huge number of symbolic product terms in a canonical and highly compact manner. The proposed approach is illustrated using a Cauer parameter low...

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Citation Context ...to exact symbolic analysis. It takes advantage of both hierarchical decomposition and a recently introduced graphical representation of symbolic determinants called Determinant Decision Diagram (DDD) =-=[9]-=-. DDD can exploit the sparsity of circuit matrices and the sharing among symbolic expressions in a systematic manner. For example, 1.01\Theta10 8 symbolic product terms can be represented by a diagram... |

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Citation Context ...ized. Such a requirement essentially calls for minimizing the total number of the boundary variables of subcircuits. Finding the optimal partitions for DDD-based hierarchical analysis is addressed in =-=[13]-=-. ffl The new method is applicable to arbitrary tree hierarchies of a circuit, and is thus superior to the topological method [11] where symbolic analysis has to be performed from the flatten circuits... |