Abstract

Dealing effectively with memory access latency is one of the key challenges in the design of shared-memory multiprocessors. Processor caches offer a way to reduce this latency but also give rise to the problem of cache coherence. Existing software solutions to the cache coherence problem are usually inefficient, while hardware solutions are typically complex and expensive to implement. In this thesis, we present a new class of software cache coherence strategies based upon the integration of a program-level abstraction for shared data, called Shared Regions (SR), with run-time cache management. In this approach, user's define a set of shared regions, the unit of sharing in the application. Data is managed at the granularity of shared regions, and coherence enforcement decisions are made dynamically through software. Within the shared regions framework, we present two types of coherence solutions. In the first, called SR-Prog, program annotations mark the beginning and end of a series o...

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